Commit Graph

7322 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes
2e64ae4101 Add SINT_TO_FP and FP_TO_SINT support for v8i32 types. Also move
a convert pattern close to the instruction definition.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136320 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28 01:26:39 +00:00
Evan Cheng
5de728cfe1 Emit an error is asm parser parsed X86_64 only registers, e.g. %rax, %sil.
This can happen in cases where TableGen generated asm matcher cannot check
whether a register operand is in the right register class. e.g. mem operands.

rdar://8204588


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136292 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 23:22:03 +00:00
Kevin Enderby
c37d4bbf1f Fix llvm-mc handing of x86 instructions that take 8-bit unsigned immediates.
llvm-mc gives an "invalid operand" error for instructions that take an unsigned
immediate which have the high bit set such as:
    pblendw $0xc5, %xmm2, %xmm1
llvm-mc treats all x86 immediates as signed values and range checks them.
A small number of x86 instructions use the imm8 field as a set of bits.
This change only changes those instructions and where the high bit is not
ignored.  The others remain unchanged.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136287 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 23:01:50 +00:00
Eli Friedman
1464846801 Code generation for 'fence' instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136283 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 22:21:52 +00:00
Eli Friedman
84e7f7e267 X86ISD::MEMBARRIER does not require SSE2; it doesn't actually generate any code, and all x86 processors will honor the required semantics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136249 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 19:43:50 +00:00
Jeffrey Yasskin
a44defeb22 Explicitly cast narrowing conversions inside {}s that will become errors in
C++0x.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136211 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 06:22:51 +00:00
Bruno Cardoso Lopes
9b4ad12b1e Move some code around to open opportunity for more shuffle matching
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136201 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 00:56:37 +00:00
Bruno Cardoso Lopes
cea34e41fa The vpermilps and vpermilpd have different behaviour regarding the
usage of the shuffle bitmask. Both work in 128-bit lanes without
crossing, but in the former the mask of the high part is the same
used by the low part while in the later both lanes have independent
masks. Handle this properly and and add support for vpermilpd.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136200 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 00:56:34 +00:00
Bruno Cardoso Lopes
cd9e5aed53 Remove more dead code!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136199 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 00:56:27 +00:00
Evan Cheng
bd27f5adbd Support .code32 and .code64 in X86 assembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136197 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 00:38:12 +00:00
Benjamin Kramer
162ee5c725 Add a neat little two's complement hack for x86.
On x86 we can't encode an immediate LHS of a sub directly. If the RHS comes from a XOR with a constant we can
fold the negation into the xor and add one to the immediate of the sub. Then we can turn the sub into an add,
which can be commuted and encoded efficiently.

This code is generated for __builtin_clz and friends.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136167 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 22:42:13 +00:00
Bruno Cardoso Lopes
4ea496846a Recognize unpckh* masks and match 256-bit versions. The new versions are
different from the previous 128-bit because they work in lanes.
Update a few comments and add testcases

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136157 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 22:03:40 +00:00
Eli Friedman
61cc47e15d Prevent x86-specific DAGCombine from creating nodes with illegal type (which could not be selected). Fixes a minor isel issue that was breaking the testcase from r136130.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136148 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 21:02:58 +00:00
Bruno Cardoso Lopes
cf128eab90 Remove now unused patterns. 0 insertions(+), 98 deletions(-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136109 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 18:22:39 +00:00
Bruno Cardoso Lopes
5e3267dac9 Cleanup old matching for PUNPCK* variants
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136108 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 18:22:27 +00:00
Bill Wendling
de77055a68 The compact unwinding offsets are divided by 8 on 64-bit machines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136065 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 08:03:49 +00:00
Bruno Cardoso Lopes
5d348b4dc4 Add 256-bit isel for movsldup/movshdup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136051 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 02:39:32 +00:00
Bruno Cardoso Lopes
9123c6fea0 More movsldup/movshdup cleanup. Rewrite the mask matching function and add
support for 256-bit versions (but no instruction selection yet, coming next).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136050 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 02:39:28 +00:00
Bruno Cardoso Lopes
5f6c440e53 More cleanup, subtarget info isn't used here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136049 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 02:39:25 +00:00
Bruno Cardoso Lopes
cc1c3526a7 Add 128-bit AVX versions of movshdup/mosldup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136048 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 02:39:23 +00:00
Bruno Cardoso Lopes
3e9235c720 Cleanup movsldup/movshdup matching.
27 insertions(+), 62 deletions(-)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136047 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 02:39:13 +00:00
Evan Cheng
28c85a81a1 Rename createCodeEmitter to createMCCodeEmitter; createObjectStreamer to createMCObjectStreamer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136031 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 00:42:34 +00:00
Evan Cheng
94b9550a32 Rename TargetAsmParser to MCTargetAsmParser and TargetAsmLexer to MCTargetAsmLexer; rename createAsmLexer to createMCAsmLexer and createAsmParser to createMCAsmParser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136027 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 00:24:13 +00:00
Chandler Carruth
b35552d440 Clean up a pile of hacks in our CMake build relating to TableGen.
The first problem to fix is to stop creating synthetic *Table_gen
targets next to all of the LLVM libraries. These had no real effect as
CMake specifies that add_custom_command(OUTPUT ...) directives (what the
'tablegen(...)' stuff expands to) are implicitly added as dependencies
to all the rules in that CMakeLists.txt.

These synthetic rules started to cause problems as we started more and
more heavily using tablegen files from *subdirectories* of the one where
they were generated. Within those directories, the set of tablegen
outputs was still available and so these synthetic rules added them as
dependencies of those subdirectories. However, they were no longer
properly associated with the custom command to generate them. Most of
the time this "just worked" because something would get to the parent
directory first, and run tablegen there. Once run, the files existed and
the build proceeded happily. However, as more and more subdirectories
have started using this, the probability of this failing to happen has
increased. Recently with the MC refactorings, it became quite common for
me when touching a large enough number of targets.

To add insult to injury, several of the backends *tried* to fix this by
adding explicit dependencies back to the parent directory's tablegen
rules, but those dependencies didn't work as expected -- they weren't
forming a linear chain, they were adding another thread in the race.

This patch removes these synthetic rules completely, and adds a much
simpler function to declare explicitly that a collection of tablegen'ed
files are referenced by other libraries. From that, we can add explicit
dependencies from the smaller libraries (such as every architectures
Desc library) on this and correctly form a linear sequence. All of the
backends are updated to use it, sometimes replacing the existing attempt
at adding a dependency, sometimes adding a previously missing dependency
edge.

Please let me know if this causes any problems, but it fixes a rather
persistent and problematic source of build flakiness on our end.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136023 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 00:09:08 +00:00
Evan Cheng
78c10eeaa5 Rename TargetAsmBackend to MCAsmBackend; rename createAsmBackend to createMCAsmBackend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136010 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 23:24:55 +00:00
Bruno Cardoso Lopes
863bd9d5cf Codegen allonesvector better while using AVX: vpcmpeqd + vinsertf128
This also fixes PR10452

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136004 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 23:05:32 +00:00
Bruno Cardoso Lopes
51e92e8e41 Add remaining 256-bit vector bitcasts. This also fixes PR10451
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136003 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 23:05:28 +00:00
Bruno Cardoso Lopes
6a32adc4e5 - Handle special scalar_to_vector case: splats. Using a native 128-bit
shuffle before inserting on a 256-bit vector.
- Add AVX versions of movd/movq instructions
- Introduce a few COPY patterns to match insert_subvector instructions.
This turns a trivial insert_subvector instruction into a register copy,
coalescing the xmm into a ymm and avoid emiting on more instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136002 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 23:05:25 +00:00
Bruno Cardoso Lopes
233fa39245 Reintroduce r135730, this is indeed the right approach, there is no
native 256-bit vector instruction to do scalar_to_vector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136001 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 23:05:16 +00:00
Benjamin Kramer
a3d782f40c Add a note about efficient codegen for binary log.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135996 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 22:30:00 +00:00
Eli Friedman
63f8dde482 Get rid of an incorrect optimization for shuffles with PALIGNR and simplify isPALIGNRMask.
Addresses PR10466, although the crash from that PR only triggers in cases where DAGCombine misses optimizing a shuffle.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135980 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 21:36:45 +00:00
Evan Cheng
4b64e8a9e1 Separate MCInstPrinter registration from AsmPrinter registration.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135974 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 21:20:24 +00:00
Evan Cheng
1b0fc9b418 Fix last bits of MC layer issues. llvm-mc doesn't need to initialize TargetMachine's anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135963 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 20:53:02 +00:00
Evan Cheng
54134708f5 Code clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135954 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 20:18:48 +00:00
Bill Wendling
39055b3a5c Update the comment. This feature is available only on Darwin at the moment. Though it's not Darwin-specific.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135951 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 20:15:15 +00:00
Oscar Fuentes
7331ac47b9 Unbreak the build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135949 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 20:13:36 +00:00
Evan Cheng
a87e40f16f More refactoring.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135939 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 19:33:48 +00:00
Evan Cheng
8c3fee5903 Refactor X86 target to separate MC code from Target code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135930 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 18:43:53 +00:00
Bill Wendling
c57e7dbfaf Changed disabled code into a flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135924 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 18:04:49 +00:00
Bill Wendling
091a864f06 Remove dead variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135923 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 18:01:27 +00:00
Bill Wendling
09b02c8ddd After we've modified the prolog to save volatile registers, generate the compact
unwind encoding for that function. This simply crawls through the prolog looking
for machine instrs marked as "frame setup". It can calculate from these what the
compact unwind should look like.

This is currently disabled because of needed linker support. But initial tests
look good.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135922 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 18:00:28 +00:00
Evan Cheng
a7cfc08ebe Move TargetAsmParser.h TargetAsmBackend.h and TargetAsmLexer.h to MC where they belong.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135833 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-23 00:45:41 +00:00
Evan Cheng
7f8dff6571 createXXXMCCodeGenInfo should be static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135826 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-23 00:01:04 +00:00
Evan Cheng
e78085a3c0 Combine all MC initialization routines into one. e.g. InitializeX86MCAsmInfo,
InitializeX86MCInstrInfo, etc. are combined into InitializeX86TargetMC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135812 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-22 21:58:54 +00:00
Bruno Cardoso Lopes
dad38638e1 Fix PR10422 by adding the necessary AVX UCOMISD memory versions to
load folding logic

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135801 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-22 20:53:20 +00:00
Bruno Cardoso Lopes
8360b5fa81 Add v8f32->v8i32 bitcast. Fixes PR10440
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135794 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-22 19:51:02 +00:00
Rafael Espindola
23e31011fb Turn shuffles into unpacks for VT == MVT::v2i64 and MVT::v2f64
too. Patch by Jeff Muizelaar.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135789 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-22 18:56:05 +00:00
Dan Gohman
6e5fda213f Fix x86's XALUO lowering to return its replacement values instead
of doing the RAUW calls for the overflow value itself. This makes
it more consistent with how the rest of LegalizeDAG works.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135788 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-22 18:45:15 +00:00
Benjamin Kramer
558cc5a914 GCC complains about the angle of this line.
Remove the escaped newline.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135739 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-22 01:02:57 +00:00
Bruno Cardoso Lopes
c41e593509 Remove the 128-bit special handling from SCALAR_TO_VECTOR. This isn't
the way to go. Doing this here will prevent several node matches later,
and would have to force looking all the way through several
VINSERTF128/VEXTRACTF128 chains to optimize simple things.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135730 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-22 00:15:10 +00:00