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2 Commits

Author SHA1 Message Date
Chad Rosier
9f4b17d14a [AArch64] Update test case to pass with post-RA MI scheduler. 
Check that the post RA scheduler is being skipped, regardless of
whether it's the top-down list latency scheduler or the post-RA
MI scheduler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217725 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-09-13 03:23:23 +00:00
Paul Robinson
5fa58a5b23 Disable each MachineFunctionPass for 'optnone' functions, unless that 
pass normally runs at optimization level None, or is part of the
register allocation pipeline.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205228 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-31 17:43:35 +00:00