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97 Commits

Author SHA1 Message Date
Eric Christopher
8258d0b4bf Remove the pmulld intrinsic and autoupdate it as a vector multiply. 
Rewrite the pmulld patterns, and make sure that they fold in loads of
arguments into the instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99910 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-30 18:49:01 +00:00
Bob Wilson
86afec7730 Reapply Kevin's change 94440, now that Chris has fixed the limitation on 
opcode values fitting in one byte (svn r99494).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99514 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-25 16:36:14 +00:00
Bob Wilson
014dc4e720 Speculatively revert this to see if it fixes buildbot failures. 
--- Reverse-merging r99440 into '.':
U    test/MC/AsmParser/X86/x86_32-bit_cat.s
U    test/MC/AsmParser/X86/x86_32-encoding.s
U    include/llvm/IntrinsicsX86.td
U    include/llvm/CodeGen/SelectionDAGNodes.h
U    lib/Target/X86/X86InstrSSE.td
U    lib/Target/X86/X86ISelLowering.h


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99450 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-24 23:26:29 +00:00
Kevin Enderby
760c2f34d9 Added the Advanced Encryption Standard (AES) Instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99440 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-24 22:33:33 +00:00
Chris Lattner
ae8f4c4f86 [llvm_void_ty] is no longer needed for result types, 
just use an empty result list.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99346 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-23 23:46:07 +00:00
Kevin Enderby
b46b03b36f Fixed the encoding problems of the crc32 instructions. All had the Operand size 
override prefix and only the r/m16 forms should have had that.  Also for variant
one, the AT&T syntax, added suffixes to all forms.  Also added the missing
64-bit form for 'CRC32 r64, r/m8'.  Plus added test cases for all forms and
tweaked one test case to add the needed suffixes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98980 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-19 20:04:42 +00:00
David Greene
60dd36592f Revert r92939. These intrinsics get matched to LLVM instructions, 
so removing at Chris' request.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92947 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-07 21:43:58 +00:00
David Greene
0d2856aa19 Add some "missing" instrinsics to make the SSE intrinsic set a bit more 
orthogonal.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92939 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-07 19:47:43 +00:00
Eric Christopher
a9256d0780 Remove the gcc builtins from the intrinsics, we'll lower them 
explicitly so we can check arguments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90199 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-01 03:18:26 +00:00
Sean Callanan
b9e6b34e1e Recommitting PALIGNR shift width fixes. 
Thanks to Daniel Dunbar for fixing clang intrinsics:
  http://llvm.org/viewvc/llvm-project?view=rev&revision=89499


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89500 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-20 22:28:42 +00:00
Sean Callanan
1bbf6d1a6f Reverting PALIGNR fix until I figure out how this 
broke the Clang testsuite.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89495 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-20 22:09:28 +00:00
Sean Callanan
201dfa7432 Fixed PALIGNR to take 8-bit rotations in all cases. 
Also fixed the corresponding testcase, and the PALIGNR
  intrinsic (tested for correctness with llvm-gcc).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89491 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-20 21:40:28 +00:00
Eric Christopher
ef1fad533e Fix PR5315, original patch by Nicolas Capens! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86203 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-06 00:11:57 +00:00
Eric Christopher
0abee0754b Add sse4.2 string/text processing intrinsics. We'll select these later. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79037 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 20:27:57 +00:00
Eric Christopher
801179579e Whitespace cleanup. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79036 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 20:27:12 +00:00
Eric Christopher
d34ab83c16 Fix some cut and paste-os. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78493 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-08 20:09:33 +00:00
Eric Christopher
63cd7e557c Define intrinsics for crc instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78482 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-08 18:07:59 +00:00
Eric Christopher
71c6753d03 Add support for gcc __builtin_ia32_ptest{z,c,nzc} intrinsics. Lower 
to ptest instruction plus setcc. Revamp ptest instruction. Add test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77407 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-29 00:28:05 +00:00
Eric Christopher
be9408ec86 Remove intrinsic support for __builtin_ia32_vec_set_v16qi and 
__builtin_ia32_vec_set_v4si as these should be lowered in the
front-end to inserts.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76714 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-22 01:11:48 +00:00
Eric Christopher
248f80d488 Add intrinsic for __builtin_ia32_vec_set_v4si which turns out to be 
pinsrd in sse4.1.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76684 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-21 23:43:14 +00:00
Evan Cheng
236aa8a503 ADDS{D|S}rr_Int and MULS{D|S}rr_Int are not commutable. The users of these intrinsics expect the high bits will not be modified. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65499 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-26 03:12:02 +00:00
Bill Wendling
cdcc3e6e12 Modify the intrinsics pattern to separate out the "return" types from the 
"parameter" types. An intrinsic can now return a multiple return values like
this:

  def add_with_overflow : Intrinsic<[llvm_i32_ty, llvm_i1_ty],
                                    [LLVMMatchType<0>, LLVMMatchType<0>]>;



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59237 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-13 09:08:33 +00:00
Mon P Wang
607ec1f608 Removed pinsrd and pinsrq intrinsics because the code generator does not support 
them since they map to insert element


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57564 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-10-15 06:27:16 +00:00
Dale Johannesen
e397acce9d Fix SSE4.1 roundss, roundsd. While the instructions have 
the same pattern as roundpd/roundps, the Intel compiler 
builtins do not:  rounds* has an extra operand.  Fixes
gcc.target/i386/sse4_1-rounds[sd]-[1234].c



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57370 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-10-10 23:51:03 +00:00
Bill Wendling
5e249b4a14 "The original bug was a complaint that _mm_srli_si128 mis-compiled when passed 
a constant vector ("{0x123, 0x456}" syntax).  The fix is to simplify the
_mm_srli_si128 macro, and  move the "* 8" from the macro into the compiler
back-end.  I can't change the existing __builtins because so many people are
using them :-(."
Patch by Stuart Hastings!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56944 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-10-02 05:56:52 +00:00
Nate Begeman
30a0de94e7 SSE codegen for vsetcc nodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53719 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-17 16:51:19 +00:00
Evan Cheng
4e444436f2 Horizontal-add instructions are not commutative. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52363 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-06-16 21:16:24 +00:00
Evan Cheng
6bd9567a6a - Add "Commutative" property to intrinsics. This allows tblgen to generate the commuted variants for dagisel matching code. 
- Mark lots of X86 intrinsics as "Commutative" to allow load folding.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52353 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-06-16 20:29:38 +00:00
Evan Cheng
a31593901d Eliminate x86.sse2.punpckh.qdq and x86.sse2.punpckl.qdq. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51533 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-24 02:56:30 +00:00
Evan Cheng
e716bb1c59 Eliminate x86.sse2.movs.d, x86.sse2.shuf.pd, x86.sse2.unpckh.pd, and x86.sse2.unpckl.pd intrinsics. These will be lowered into shuffles. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51531 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-24 02:14:05 +00:00
Evan Cheng
3cc8f9bfef Remove x86.sse2.loadh.pd and x86.sse2.loadl.pd. These will be lowered into load and shuffle instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51521 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-24 00:07:06 +00:00
Evan Cheng
22b942aa4d Add separate intrinsics for MMX / SSE shifts with i32 integer operands. This allow us to simplify the horribly complicated matching code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50601 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-05-03 00:52:09 +00:00
Evan Cheng
fa5a91a71e Undo 48570. Correctly match mmx shift instructions with an immediate operand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48627 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-21 00:40:09 +00:00
Evan Cheng
dff1dcac6c Add intrinsics to match mmx shift builtin's with immediate operand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48569 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-19 23:38:52 +00:00
Nate Begeman
d254ca2b8e __builtin_ia32_movntdqa reads memory 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48431 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-16 21:15:47 +00:00
Dale Johannesen
131d5c9f4a Missed one. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46733 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-05 01:12:10 +00:00
Dale Johannesen
a76619337e Do not unconditionally redefine vec_ext_v16qi and 
vec_ext_v4si builtins.  This is a hack; they should
be defined here, then resolved in the X86 BE.
However there is enough other stuff missing in the
X86 BE for SSE41 that this will do for now.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46727 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-04 23:27:29 +00:00
Nate Begeman
63ec90a6a8 SSE 4.1 Intrinsics and detection 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46681 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-03 07:18:54 +00:00
Evan Cheng
92b7c1d94e Fix sse2.psrl.w and sse2.psrl.q definitions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45772 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-01-09 02:16:44 +00:00
Chris Lattner
234d529e58 remove attribution from a variety of miscellaneous files. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45425 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-29 22:59:10 +00:00
Evan Cheng
56bf2f8288 Add a few more missing gcc builtin's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45278 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-21 01:30:39 +00:00
Evan Cheng
f6cb6eeb5a Type specification didn't match gcc's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45260 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-20 09:35:28 +00:00
Evan Cheng
a5cecd0a13 Remove int_x86_sse2_movl_dq. It's replaced with a string compare. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45140 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-18 01:04:25 +00:00
Evan Cheng
a4d6818dbe These have matching builtin's in 4.2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45139 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-18 00:52:20 +00:00
Evan Cheng
f9b83fcf95 Bring back int_x86_sse2_movl_dq intrinsic for backward compatibility. Make sure 
it's auto-upgraded to a shufflevector instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45131 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-17 22:33:23 +00:00
Evan Cheng
1d0ba37099 __builtin_ia32_movqv4si is now expanded to a shuffle. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45057 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-15 02:54:12 +00:00
Anders Carlsson
d04764a8ac All MMX shift instructions took a <2 x i32> vector as the shift amount parameter. Change this to be <1 x i64> instead, which matches the assembler instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45027 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-14 06:38:54 +00:00
Dale Johannesen
c784208a73 Add missing SSE builtins: CVTPD2PI, CVTPS2PI, 
CVTTPD2PI, CVTTPS2PI, CVTPI2PD, CVTPI2PS.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43523 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-30 22:15:38 +00:00
Dale Johannesen
6e3a8f3dfb Fix argument types for PSLLQ, PSRLQ. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43490 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-30 01:44:33 +00:00
Dan Gohman
66018ea1b2 There is no {rsqrt,rcp}{p,s}d. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42190 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-21 15:24:00 +00:00