6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-08-08 19:29:45 +00:00
Code Issues Projects Releases Wiki Activity
41,016 Commits 39 Branches 0 Tags 277 MiB
3aac788365
Commit Graph

53 Commits

Author SHA1 Message Date
Duraid Madina
5ef2ec9929 assorted fixes: 
* clean up immediates (we use 14, 22 and 64 bit immediates now. sane.)
  * fold r0/f0/f1 registers into comparisons against 0/0.0/1.0
  * fix nasty thinko - didn't use two-address form of conditional add
    for extending bools to integers, so occasionally there would be
    garbage in the result. it's amazing how often zeros are just
    sitting around in registers ;) - this should fix a bunch of tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21221 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-11 05:55:56 +00:00
Duraid Madina
290f64c1cb daintyness 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20955 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-31 07:36:43 +00:00
Duraid Madina
9b9d45f60e and so it begins... 
PHASE 1: write instruction selector
PHASE 2: ???
PHASE 3: profit!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20652 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-17 18:17:03 +00:00