Commit Graph

2911 Commits

Author SHA1 Message Date
Chris Lattner
3df577b71b add some debug hooks for tracking the behavior of the isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96812 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-22 22:15:39 +00:00
Dan Gohman
fb76fe0929 Fix various doxygen warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96779 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-22 04:10:52 +00:00
Chris Lattner
74fd536158 enhance my hack for flags handling, this allows us to pass
CodeGen/X86/pr2182.ll.  Down to 13 x86 failures out of ~1100


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96770 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-22 00:47:38 +00:00
Chris Lattner
565a6f9480 fix most of the failures in the x86 suite by handling multiple
result nodes correctly.  Note that this includes a horrible hack
in DAGISelHeader which cannot be fixed reasonably without 
eliminating (parallel) from input patterns.  That, in turn,
can't be done until we support writing multiple result patterns
for the X86and_flag and related multiple-result nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96767 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 23:54:05 +00:00
Chris Lattner
502035e541 fix an odd thinko in an assertion, all arm tests pass now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96758 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 20:57:28 +00:00
Anton Korobeynikov
293d592bf9 It turned out that we failed to emit proper symbol stubs on non-x86/darwin for ages (we emitted a reference to a stub, but no stub was emitted). The code inside x86-32/macho target objfile lowering should actually be the generic one - move it there.
This (I really, really hope) should fix EH issues on ppc/darwin
and arm/darwin.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96755 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 20:28:15 +00:00
Chris Lattner
be94ffcf12 speculatively teach OPC_CheckValueType and OPC_EmitNode to handle
MVT::iPTR.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96753 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 20:15:25 +00:00
Chris Lattner
be92e6a0d2 teach OPC_CheckType to handle MVT::iPTR, down to 2 ppc failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96752 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 20:10:43 +00:00
Chris Lattner
1d4cb41fdd make this check a bit more generous, it may be outliving its
utility.  Down to 6 ppc failures.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96751 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 20:02:15 +00:00
Chris Lattner
1e4b8bc93b Relax an assertion a bit. We allow replacing things like
<4 x i32> with <4 x float> values if they end up the same
register class.  This gets us up to 231 passes on the ppc
tests (only 7 fails).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96750 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 19:35:07 +00:00
Chris Lattner
863cc971e8 when a match fails and we have to rollback, make sure to keep 'N' in
sync with the top of stack.  This fixes a bunch of failures on larger
testcases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96732 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 07:55:48 +00:00
Chris Lattner
0fb65cffa6 handle optional in flags that aren't present.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96731 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 07:19:06 +00:00
Chris Lattner
a7399e4abf fix two bugs in OPC_EmitRegister, which makes ppc happier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96728 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 06:58:27 +00:00
Chris Lattner
77f2e2724d implement the last known missing feature: updating uses of results
of the matched pattern to use the newly created node results.  Onto
the "making it actually work" phase!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96724 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 06:03:07 +00:00
Chris Lattner
8e946bea14 Lots of improvements to the new dagisel emitter. This gets it to
the point where it is to the 95% feature complete mark, it just
needs result updating to be done (then testing, optimization 
etc).

More specificallly, this adds support for chain and flag handling
on the result nodes, support for sdnodexforms, support for variadic
nodes, memrefs, pinned physreg inputs, and probably lots of other
stuff.

In the old DAGISelEmitter, this deletes the dead code related to
OperatorMap, cleans up a variety of dead stuff handling "implicit
remapping" from things like globaladdr -> targetglobaladdr (which
is no longer used because globaladdr always needs to be legalized),
and some minor formatting fixes.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96716 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 03:22:59 +00:00
Chris Lattner
beff6a3fd0 add a hook so that the new isel can run SDNodeXForms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96714 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 03:15:11 +00:00
Bob Wilson
6b89aa57e6 Revert Anton's most recent EH patch (r96637), since it breaks a lot of
ARM and Thumb tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96680 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-19 17:10:59 +00:00
Chris Lattner
906b4995ee add emitter support for integer constants and simple physreg references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96663 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-19 07:49:56 +00:00
Anton Korobeynikov
f0e7c87e56 Use the same encoding for EH stuff uniformly on all MachO targets.
This hopefulyl should unbreak EH on PPC/Darwin.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96637 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-19 00:29:36 +00:00
Mon P Wang
1c40e188c5 getSplatIndex assumes that the first element of the mask contains the splat index
which is not always true if the mask contains undefs. Modified it to return
the first non undef value.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96621 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-18 22:33:18 +00:00
Chris Lattner
845c042734 add support for referencing registers and immediates,
building the tree to represent them but not emitting 
table entries for them yet.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96617 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-18 22:03:03 +00:00
Jakob Stoklund Olesen
352d352c02 Always normalize spill weights, also for intervals created by spilling.
Moderate the weight given to very small intervals.

The spill weight given to new intervals created when spilling was not
normalized in the same way as the original spill weights calculated by
CalcSpillWeights. That meant that restored registers would tend to hang around
because they had a much higher spill weight that unspilled registers.

This improves the runtime of a few tests by up to 10%, and there are no
significant regressions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96613 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-18 21:33:05 +00:00
Eric Christopher
49cf3a7173 Fix a few unused parameter warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96533 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-17 23:55:26 +00:00
David Greene
1157f791c9 Make the non-temporal bit "significant" in MemSDNodes so they aren't
CSE'd or otherwise combined with temporal MemSDNodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96505 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-17 20:21:42 +00:00
Chris Lattner
0a3f39985b move isOnlyReachableByFallthrough out of MachineBasicBlock into AsmPrinter,
and add a sparc implementation that knows about delay slots.  Patch by
Nathan Keynes!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96492 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-17 18:52:56 +00:00
Chris Lattner
9a747f1305 Emulate the current isel's "IsChainCompatible" logic for now.
I'd like to eventually rip it out, but for now producing the
same selections as the old matcher is more important.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96458 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-17 06:23:39 +00:00
Chris Lattner
d9c1a344a0 simplify IsChainCompatible codegen, add comments. no
functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96453 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-17 05:35:28 +00:00
Chris Lattner
bd12fe8b69 make the new isel's interpreter loop call the generated
CheckComplexPattern function.  Though it is logically const,
I don't have the fortitude to clean up all the targets now,
and it not being const doesn't block anything.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96426 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-17 00:41:34 +00:00
Chris Lattner
21390d7984 convert the new matcher to check intermediate nodes for a single
use and only call IsProfitableToFold/IsLegalToFold on the load
being folded, like the old dagiselemitter does.  This 
substantially simplifies the code and improves opportunities for
sharing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96368 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 19:15:55 +00:00
Chris Lattner
050a03d0f3 generate code for node and pattern predicates. Note that this won't
build if enabled, it will fail with constness issues. I'll resolve 
these next.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96336 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 07:21:10 +00:00
Chris Lattner
e39650a805 add support for the new isel matcher to generate
(isprofitable|islegal)tofold checks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96331 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 06:10:58 +00:00
Anton Korobeynikov
362dd0bef5 Move TLOF implementations to libCodegen to resolve layering violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96288 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 22:37:53 +00:00
Anton Korobeynikov
9184b25fa5 Preliminary patch to improve dwarf EH generation - Hooks to return Personality / FDE / LSDA / TType encoding depending on target / options (e.g. code model / relocation model) - MCIzation of Dwarf EH printer to use encoding information - Stub generation for ELF target (needed for indirect references) - Some other small changes here and there
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96285 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 22:35:59 +00:00
Evan Cheng
014bf215c3 Split SelectionDAGISel::IsLegalAndProfitableToFold to
IsLegalToFold and IsProfitableToFold. The generic version of the later simply checks whether the folding candidate has a single use.

This allows the target isel routines more flexibility in deciding whether folding makes sense. The specific case we are interested in is folding constant pool loads with multiple uses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96255 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 19:41:07 +00:00
David Greene
1e559443a1 Add non-temporal flags and remove an assumption of default arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96240 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 17:00:31 +00:00
David Greene
ba2b297ca5 Add non-temporal flags to MachineMemOperand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96226 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 16:48:31 +00:00
Chris Lattner
da272d1a70 Check in the first big step of rewriting DAGISelEmitter to
produce a table based matcher instead of gobs of C++ Code.

Though it's not done yet, the shrinkage seems promising,
the table for the X86 ISel is 75K and still has a lot of 
optimization to come (compare to the ~1.5M of .o generated
the old way, much of which will go away).

The code is currently disabled by default (the #if 0 in
DAGISelEmitter.cpp).  When enabled it generates a dead
SelectCode2 function in the DAGISel Header which will
eventually replace SelectCode.

There is still a lot of stuff left to do, which are
documented with a trail of FIXMEs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96215 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 08:04:42 +00:00
Chris Lattner
9f06cb4fe5 give SDValue an operator->, allowing V->isTargetOpcode() and
many other natural things.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96214 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 07:11:34 +00:00
Chris Lattner
5ac03f1786 don't make insanely large node numbers for no reason,
packing somewhat densely is better than not.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96213 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 06:39:31 +00:00
Evan Cheng
7545f49a5e Teach MachineFrameInfo to track maximum alignment while stack objects are being
created. This ensures it's updated at all time. It means targets which perform
dynamic stack alignment would know whether it is required and whether frame
pointer register cannot be made available register allocation.
This is a fix for rdar://7625239. Sorry, I can't create a reasonably sized test
case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96069 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 01:56:41 +00:00
Anton Korobeynikov
4dd162f394 Cleanup stdcall / fastcall name mangling.
This should fix alot of problems we saw so far, e.g. PRs 5851 & 2936

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95980 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 15:28:40 +00:00
Bob Wilson
fe61fb1e10 Add a new pass on machine instructions to optimize away PHI cycles that
reduce down to a single value.  InstCombine already does this transformation
but DAG legalization may introduce new opportunities.  This has turned out to
be important for ARM where 64-bit values are split up during type legalization:
InstCombine is not able to remove the PHI cycles on the 64-bit values but
the separate 32-bit values can be optimized.  I measured the compile time 
impact of this (running llc on 176.gcc) and it was not significant.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95951 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 01:30:21 +00:00
Dale Johannesen
9a722caa26 Allow isDebug inquiry on any MO.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95818 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 23:03:20 +00:00
Dan Gohman
f3b11aa6a7 Fix several comments which had previously been "the the" where a
different word was intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95795 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 20:04:19 +00:00
Dan Gohman
f451cb870e Fix "the the" and similar typos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95781 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 16:03:48 +00:00
Chris Lattner
45282aedb9 fix a layering violation: VirtRegRewriter.cpp shouldn't use AsmPrinter.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95748 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 01:23:18 +00:00
Chris Lattner
a655f088b8 Stop MachineInstr.h from #including AsmPrinter.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95741 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 01:04:16 +00:00
Chris Lattner
47529c9ac6 Move verbose asm instruction comments to using MCStreamer.
The major win of this is that the code is simpler and they 
print on the same line as the instruction again:

        movl    %eax, 96(%esp)          ## 4-byte Spill
        movl    96(%esp), %eax          ## 4-byte Reload
        cmpl    92(%esp), %eax          ## 4-byte Folded Reload
        jl      LBB7_86



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95738 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 00:47:53 +00:00
Dale Johannesen
3b1906f48d more comment updates
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95736 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 00:44:23 +00:00
Dale Johannesen
9653f9ec97 Add isDebug argument to ChangeToRegister; this prevents
the field from being used uninitialized later in some cases.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95735 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 00:41:49 +00:00