Commit Graph

65108 Commits

Author SHA1 Message Date
Jiangning Liu
3ff3a8aa75 Implement AArch64 Neon Crypto instruction classes AES, SHA, and 3 SHA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194085 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-05 17:42:05 +00:00
Rafael Espindola
e05744ba85 Convert FindFunctionInStream to return an error_code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194084 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-05 17:16:08 +00:00
Michael Gottesman
f23af8bfd8 [objc-arc] Convert the one directional retain/release relation assert to a conditional check + fail.
Due to the previously added overflow checks, we can have a retain/release
relation that is one directional. This occurs specifically when we run into an
additive overflow causing us to drop state in only one direction. If that
occurs, we should bail and not optimize that retain/release instead of
asserting.

Apologies for the size of the testcase. It is necessary to cause the additive
cfg overflow to trigger.

rdar://15377890

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194083 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-05 16:02:40 +00:00
Benjamin Kramer
a83342ba3b Silence GCC warning about dropping off a fully covered switch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194077 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-05 13:45:09 +00:00
Reed Kotler
a2e6e6bcf8 Remove the word "thumb" from comments. Remove also an incorrect
command regarding the porting from the ARM version (was an old comment).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194066 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-05 12:04:37 +00:00
David Majnemer
8f198b0d60 X86 Disassembler: remove unused bool typedef-name
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194062 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-05 10:34:42 +00:00
Reed Kotler
c0e9800d45 Fix r194019 as requested by Eric Christopher.
Submit the basic port of the rest of ARM constant islands code to Mips. 
Two test cases are added which reflect the next level of functionality:
constants getting moved to water areas that are out of range from the
initial placement at the end of the function and basic blocks being split to
create water when none exists that can be used. There is a bunch of this
code that is not complete and has been marked with IN_PROGRESS. I will
finish cleaning this all up during the next week or two and submit the
rest of the test cases. I have elminated some code for dealing with
inline assembly because to me it unecessarily complicates things and
some of the newer features of llvm like function attributies and builtin
assembler give me better tools to solve the alignment issues created
there. Also, for Mips16 I even have the option of not doing constant
islands in the present of inline assembler if I chose. When everything
has been completed I will summarize the port and notify people that
are knowledgable regarding the ARM Constant Islands code so they can
review it in it's entirety if they wish.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194053 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-05 08:14:14 +00:00
Craig Topper
f6157f00db Lift alignment restrictions on load folding for a significant portion of AVX instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194048 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-05 06:31:43 +00:00
Hao Liu
591c2f738a Implement AArch64 post-index vector load/store multiple N-element structure class SIMD(lselem-post).
Including following 14 instructions:
4 ld1 insts: post-index load multiple 1-element structure to sequential 1/2/3/4 registers.
ld2/ld3/ld4: post-index load multiple N-element structure to sequential N registers (N=2,3,4).
4 st1 insts: post-index store multiple 1-element structure from sequential 1/2/3/4 registers.
st2/st3/st4: post-index store multiple N-element structure from sequential N registers (N = 2,3,4).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194043 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-05 03:39:32 +00:00
Kevin Qin
8263dcdf23 Implemented aarch64 neon intrinsic vcopy_lane with float type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194041 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-05 02:03:59 +00:00
Yuchen Wu
f44533c65e Revert "llvm-cov: Added command-line option to change dir."
This reverts commit d8acf0078c.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194040 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-05 01:56:29 +00:00
Yuchen Wu
d8acf0078c llvm-cov: Added command-line option to change dir.
This will allow for much easier testing when the input files are in a
different folder from the test script.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194034 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-05 01:20:41 +00:00
Yuchen Wu
e85959cb2c Support for reading run counts in llvm-cov.
This patch enables llvm-cov to correctly output the run count stored in
the GCDA file. GCOVProfiling currently does not generate this
information, so the GCDA run data had to be hacked on from a GCDA file
generated by gcc. This is corrected by a subsequent patch.

With the run and program data included, both llvm-cov and gcov produced
the same output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194033 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-05 01:11:58 +00:00
Hal Finkel
c88eb08d02 Add a runtime unrolling parameter to the LoopUnroll pass constructor
As with the other loop unrolling parameters (the unrolling threshold, partial
unrolling, etc.) runtime unrolling can now also be controlled via the
constructor. This will be necessary for moving non-trivial unrolling late in
the pass manager (after loop vectorization).

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194027 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-05 00:08:03 +00:00
NAKAMURA Takumi
225f35a87c Revert r194019 to r194021, "Submit the basic port of the rest of ARM constant islands code to Mips."
It broke -Asserts build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194026 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-04 23:14:36 +00:00
Tim Northover
e53abc2072 ARM: remove unnecessary state-tracking during frame lowering.
ResolveFrameIndex had what appeared to be a very nasty hack for when the
frame-index referred to a callee-saved register. In this case it "adjusted" the
offset so that the address was correct if (and only if) the MachineInstr
immediately followed the respective push.

This "worked" for all forms of GPR & DPR but was only ever used to set the
frame pointer itself, and once this was put in a more sensible location the
entire state-tracking machinery it relied on became redundant. So I stripped
it.

The only wrinkle is that "add r7, sp, #0" might theoretically be slower (need
an actual ALU slot) compared to "mov r7, sp" so I added a micro-optimisation
that also makes emitARMRegUpdate and emitT2RegUpdate also work when NumBytes ==
0.

No test changes since there shouldn't be any functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194025 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-04 23:04:15 +00:00
Tim Northover
627ef0cf5e AArch64: use default asm operand printing when modifier inapplicable
If an inline assembly operand has multiple constraints (e.g. "Ir" for immediate
or register) and an operand modifier (E.g. "w" for "print register as wN") then
we need to decide behaviour when the modifier doesn't apply to the constraint.

Previousely produced some combination of an assertion failure and a fatal
error. GCC's behaviour appears to be to ignore the modifier and print the
operand in the default way. This patch should implement that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194024 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-04 23:04:07 +00:00
Reed Kotler
ba29378fdc Make sure we don't get a warning from this variable that is only used
when compiling with DEBUG.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194021 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-04 22:42:17 +00:00
Reed Kotler
1ef9083122 Submit the basic port of the rest of ARM constant islands code to Mips.
Two test cases are added which reflect the next level of functionality:
constants getting moved to water areas that are out of range from the
initial placement at the end of the function and basic blocks being split to
create water when none exists that can be used. There is a bunch of this
code that is not complete and has been marked with IN_PROGRESS. I will
finish cleaning this all up during the next week or two and submit the
rest of the test cases. I have elminated some code for dealing with
inline assembly because to me it unecessarily complicates things and
some of the newer features of llvm like function attributies and builtin
assembler give me better tools to solve the alignment issues created
there. Also, for Mips16 I even have the option of not doing constant
islands in the present of inline assembler if I chose.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194019 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-04 22:11:25 +00:00
Shuxin Yang
6f744ee498 Remove dead code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194017 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-04 21:44:01 +00:00
Eric Christopher
3faf43fc66 Check for both styles of clobbers, those produced by dragonegg and
those produced by clang for the inline asm bswap conversion.

Modified from a patch by Chris Smowton.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194016 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-04 21:41:21 +00:00
Benjamin Kramer
63d8f88686 SLPVectorizer: Use properlyDominates to satisfy the irreflexivity of a strict weak ordering.
STL debug mode checks this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194015 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-04 21:34:55 +00:00
Matt Arsenault
896a885f21 Fix another constant folding address space place I missed.
This fixes an assertion failure with a different sized address space.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194014 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-04 20:46:52 +00:00
Matt Arsenault
eba6d38448 Scalarize select vector arguments when extracted.
When the elements are extracted from a select on vectors
or a vector select, do the select on the extracted scalars
from the input if there is only one use.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194013 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-04 20:36:06 +00:00
Jakub Staszak
42f2a6b41e Use startswith_lower() where possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194007 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-04 19:22:50 +00:00
Cameron McInally
2e58f1d4cf Add support for AVX512 masked vector blend intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194006 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-04 19:14:56 +00:00
Rafael Espindola
e076b5338a Change BitcodeReader to use error_code instead of bool + string.
In order to create an ObjectFile implementation that uses bitcode files, we
need to propagate the bitcode errors to the ObjectFile interface, so we need
to convert it to use the same error handling as ObjectFile: error_code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193996 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-04 16:16:24 +00:00
Zoran Jovanovic
5c042162be Support for microMIPS branch instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193992 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-04 14:53:22 +00:00
Benjamin Kramer
00e3be6134 X86: Add a description for AMD bdver3 aka Steamroller.
This is just bdver2 + FSGSBase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193984 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-04 10:29:20 +00:00
Filip Pizlo
fa0da86a59 Make the pretty stack trace be an opt-in, rather than opt-out, facility. Enable pretty
stack traces by default if you use PrettyStackTraceProgram, so that existing LLVM-based 
tools will continue to get it without any changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193971 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-04 02:22:25 +00:00
Elena Demikhovsky
633f98bdfa AVX-512: added VPCONFLICT instruction and intrinsics,
added EVEX_KZ to tablegen


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193959 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-03 13:46:31 +00:00
Benjamin Kramer
ec346c1314 SLPVectorizer: Add a missing pair of parens. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193958 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-03 12:54:32 +00:00
Venkatraman Govindaraju
fcd5e86396 [SparcV9] Handle i64 <-> float conversions in sparcv9 mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193957 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-03 12:28:40 +00:00
Benjamin Kramer
0c7ba3cef2 SLPVectorizer: When CSEing generated gathers only scan blocks containing them.
Instead of doing a RPO traversal of the whole function remember the blocks
containing gathers (typically <= 2) and scan them in dominator-first order.

The actual CSE is still quadratic, but I'm not confident that adding a
scoped hash table here is worth it as we're only looking at the generated
instructions and not arbitrary code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193956 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-03 12:27:52 +00:00
David Majnemer
16d1098718 Revert "Inliner: Handle readonly attribute per argument when adding memcpy"
This reverts commit r193356, it caused PR17781.

A reduced test case covering this regression has been added to the test suite.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193955 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-03 12:22:13 +00:00
David Majnemer
42864070b0 Spell "Actual" correctly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193954 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-03 11:09:39 +00:00
Venkatraman Govindaraju
5e45051e0e [Sparc] Expand FP_TO_UINT, UINT_TO_FP for fp128.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193947 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-03 08:00:19 +00:00
Bob Wilson
208130f113 Convert calls to __sinpi and __cospi into __sincospi_stret
This adds an SimplifyLibCalls case which converts the special __sinpi and
__cospi (float & double variants) into a __sincospi_stret where appropriate to
remove duplicated work.

Patch by Tim Northover

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193943 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-03 06:48:38 +00:00
Bob Wilson
cb01efb798 Enable optimization of sin / cos pair into call to __sincos_stret for iOS7+.
rdar://12856873
Patch by Evan Cheng, with a fix for rdar://13209539 by Tilmann Scheller

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193942 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-03 06:14:38 +00:00
Venkatraman Govindaraju
11cecbe1a0 [SparcV9] Add ctpop instruction for i64. Also, expand ctlz, cttz and bswap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193941 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-03 05:59:07 +00:00
Filip Pizlo
35a1e9414d When LLVM is embedded in a larger application, it's not OK for LLVM to intercept crashes. LLVM already has
the ability to disable this functionality.  This patch exposes it via the C API.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193937 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-03 00:29:47 +00:00
Rafael Espindola
bc884fd9f7 move getSymbolNMTypeChar to the one program that needs it: nm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193933 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-02 21:16:09 +00:00
Rafael Espindola
66b8ec520f Convert another use of getSymbolNMTypeChar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193932 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-02 20:10:07 +00:00
Rafael Espindola
1b6c8d1f6c Avoid some getSymbolNMTypeChar uses in COFFObjectFile.cpp itself.
This is a fixed version of 193928 which keeps these uses in sync.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193931 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-02 18:07:48 +00:00
Rafael Espindola
7e56fc6ae1 Revert "Don't use getSymbolNMTypeChar for implementing COFFObjectFile::getSymbolFileOffset."
Investigating a bot failure.

This reverts commit r193928.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193929 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-02 17:12:49 +00:00
Rafael Espindola
30c8dc8c82 Don't use getSymbolNMTypeChar for implementing COFFObjectFile::getSymbolFileOffset.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193928 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-02 16:55:21 +00:00
Benjamin Kramer
9bbc7b4e49 SLPVectorizer: Remove duplicated function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193927 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-02 14:46:27 +00:00
Benjamin Kramer
ff566d8f44 LoopVectorize: Remove quadratic behavior the local CSE.
Doing this with a hash map doesn't change behavior and avoids calling
isIdenticalTo O(n^2) times. This should probably eventually move into a utility
class shared with EarlyCSE and the limited CSE in the SLPVectorizer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193926 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-02 13:39:00 +00:00
Rafael Espindola
6152f7d596 Fix llvm-nm to mach OS X's nm on some tests.
There is still a long way to go for llvm-nm, but at least we now match
nm's letter output in the cases we test for.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193912 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-02 05:03:24 +00:00
Michael Liao
9d293f1f68 Fix PR17764
- When selecting BLEND from vselect, the operands need swapping as due to the
  difference between vselect and SSE/AVX's BLEND insn



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193900 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-02 00:10:02 +00:00