Commit Graph

4123 Commits

Author SHA1 Message Date
Chris Lattner
424dcbdb3b add a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22982 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-23 06:27:59 +00:00
Nate Begeman
8ca5693c51 Ack, typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22981 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-23 05:45:10 +00:00
Nate Begeman
a50d53e5ef Add an option to make SetCC illegal as a beta option
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22979 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-23 05:42:36 +00:00
Nate Begeman
354df0ae6d Remove some instructions we no longer generate
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22976 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-23 01:16:46 +00:00
Chris Lattner
1f24df6324 Remove some regs that are not used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22975 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-22 22:32:13 +00:00
Chris Lattner
9dc4d3cbac Nate noticed that 30% of the malloc/frees in llc come from calls to LowercaseString
in the asmprinter.  This changes the .td files to use lower case register names,
avoiding the need to do this call.  This speeds up the asmprinter from 1.52s
to 1.06s on kc++ in a release build.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22974 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-22 22:00:02 +00:00
Chris Lattner
0a00bece0d Fix a crash I introduced into the IA64 backend with my copyfromreg change.
It used to crash on any function that took float arguments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22973 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-22 21:33:11 +00:00
Chris Lattner
47c0889419 Add a pass name for -time-passes output
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22970 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-22 18:28:09 +00:00
Chris Lattner
f7f2255505 Implement stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22963 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-22 01:27:59 +00:00
Chris Lattner
ddf3e7dfd7 Fix compilation of:
float %test2(float* %P) {
        %Q = load float* %P
        %R = add float %Q, %Q
        ret float %R
}

By returning the right result.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22961 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-22 00:59:14 +00:00
Chris Lattner
b30ee6a41a Make sure expressions only have one use before emitting them into a place that is conditionally executed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22960 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-22 00:47:28 +00:00
Chris Lattner
9944b76cfe Implement most of load support. There is still a bug though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22959 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-21 22:31:09 +00:00
Chris Lattner
1db1adbdee Don't print out the MBB label for the entry mbb
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22953 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-21 19:09:33 +00:00
Chris Lattner
f913d3f91c Simplify the logic for BRTWOWAY_CC handling. The isel code already
simplifies BRTWOWAY into BR if one of the results is a fall-through.
Unless I'm missing something, there is no reason to duplicate this
in the target-specific code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22952 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-21 19:03:28 +00:00
Chris Lattner
2fbb4579d6 Implement selection for branches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22951 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-21 18:50:37 +00:00
Chris Lattner
4dd4a2d278 If the false value for a select_cc is really simple (has no inputs), evaluate
it in the block.  This codegens:

int %test(bool %c) {
        %retval = select bool %c, int 17, int 1
        ret int %retval
}

as:

_test:
        rlwinm r2, r3, 0, 31, 31
        li r2, 17
        cmpwi cr0, r3, 0
        bne .LBB_test_2 ;
.LBB_test_1:    ;
        li r2, 1
.LBB_test_2:    ;
        or r3, r2, r2
        blr

instead of:

_test:
        rlwinm r2, r3, 0, 31, 31
        li r2, 17
        li r4, 1
        cmpwi cr0, r3, 0
        bne .LBB_test_2 ;
.LBB_test_1:    ;
        or r2, r4, r4
.LBB_test_2:    ;
        or r3, r2, r2
        blr

... which is one fewer instruction.  The savings are more significant for
global address and constantfp nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22946 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-21 17:41:11 +00:00
Duraid Madina
7340dd5d2e reenable collapse of loadimm+AND -> dep.z (thanks guys)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22944 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-21 15:43:53 +00:00
Jim Laskey
ffb973df92 Repair an out by one error for IA64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22942 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-20 11:05:23 +00:00
Chris Lattner
4416f1a0a5 add support for global address, including PIC support.
This REALLY should be lowered by the legalizer!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22941 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 22:38:53 +00:00
Chris Lattner
7e65997c43 Fix a typeo, no wonder all tokenfactor edges were the same!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22935 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 21:33:02 +00:00
Chris Lattner
ecbce617ca Split RegisterClass 'Methods' into MethodProtos and MethodBodies
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22929 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 19:13:20 +00:00
Chris Lattner
f0c5f67dbc put reg classes into namespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22927 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 18:53:43 +00:00
Chris Lattner
fabc8ffacb Put reg classes into namespaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22926 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 18:52:55 +00:00
Chris Lattner
03ba7b9f25 Put register classes into namespaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22925 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 18:51:57 +00:00
Chris Lattner
cbec3b00bd Put register classes in namespaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22924 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 18:50:46 +00:00
Chris Lattner
e7af178ccf Fix code that assumes the register info will be dumped into a target
namespace instead of the reg class namespace.  Update getRegClassForType()
to use modified names due to tblgen change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22923 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 18:50:11 +00:00
Chris Lattner
28e728d75a put reg classes in namespaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22922 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 18:49:22 +00:00
Chris Lattner
1ff9540c17 Require that targets specify a namespace for their register classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22921 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 18:48:48 +00:00
Chris Lattner
6096f0d4c6 The skeleton target has never had an isel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22917 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 18:35:41 +00:00
Chris Lattner
8212203ab9 This code has always been dead on itanium
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22916 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 18:34:37 +00:00
Chris Lattner
5499742c06 This code has always been dead for alpha
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22915 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 18:33:26 +00:00
Chris Lattner
2505d6b727 The simple isel being gone makes this dead!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22914 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 18:32:03 +00:00
Chris Lattner
0b1e641b82 Now that the simple isels are dead, so is this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22913 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 18:30:39 +00:00
Chris Lattner
c19d5621ae Sparcv9 gets no operand info
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22909 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 16:56:56 +00:00
Duraid Madina
a91103430b a bugfix (up top) and a quick repair job: disable generation of dep.z
(which died about a week ago) so we're back to load-(2^n-1)-then-AND
sequences. slow, but things should now be Almost Completely Working,
modulo those pesky alignment/ABI issues.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22904 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 13:25:50 +00:00
Nate Begeman
27d53ba6dd Fix a bug where we were passing the wrong number of arguments to an
instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22901 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 03:42:28 +00:00
Chris Lattner
80132a4b48 mark variable arity instructions as such. Alpha wins the battle for
cleanest backend in this metric :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22893 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 00:51:37 +00:00
Chris Lattner
efc58be8ca Mark some instructions as variable_ops, and PSEUDO_ALLOC as taking a GPR.
I'm not convinced this is all of them,  but I can't do much testing, because
IA64 LLC crashes on big programs :(


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22892 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 00:47:42 +00:00
Chris Lattner
9d9dc816d0 add a few missing cases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22891 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 00:41:29 +00:00
Chris Lattner
b822abade7 Give ADJCALLSTACKDOWN/UP the correct operands.
Give a whole bunch of other stuff variable operands, particularly FP.  The
FP stackifier is playing fast and loose with operands here, so we have to
mark them all as variable.  This will have to be fixed before we can dag->dag
the X86 backend.  The solution is for the pre-stackifier and post-stackifier
instructions to all be disjoint.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22890 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 00:38:22 +00:00
Nate Begeman
02b88a4586 ISD::OR, and it's accompanying SelectBitfieldInsert
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22889 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 00:38:14 +00:00
Chris Lattner
679c408768 The variable SAR's only take one operand too
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22888 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 00:31:37 +00:00
Chris Lattner
fd444b2a69 Stop adding bogus operands to variable shifts on X86. These instructions
only take one operand.  The other comes implicitly in through CL.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22887 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 00:16:17 +00:00
Nate Begeman
73bfa71524 Remove the X86 and PowerPC Simple instruction selectors; their time has
passed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22886 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 23:53:15 +00:00
Nate Begeman
c15ed447f4 Add shifts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22884 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 23:38:00 +00:00
Chris Lattner
45fcb8f410 Fix operand numbers by marking variable arity nodes as such and by fixing
the operand lists of a few other nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22883 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 23:25:33 +00:00
Chris Lattner
3f852b45fc MFLR doesn't take an operand, the LR register is implicit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22882 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 23:24:50 +00:00
Chris Lattner
329cdc3801 Add a new flag
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22881 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 23:17:07 +00:00
Chris Lattner
0bc04231c0 Move this to the emitter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22877 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 20:08:53 +00:00
Jim Laskey
5b5f0b7fd5 More optimal solution for loading constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22870 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 18:58:23 +00:00