Chris Lattner
cedc6f4b30
PHI and INLINEASM are now built-in instructions provided by Target.td
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25674 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 01:46:15 +00:00
Duraid Madina
dfa28ac56f
die, die!! r15, you are not callee-saved
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25527 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-23 06:11:45 +00:00
Duraid Madina
b9bcd18794
fix register corruption! (my god.) r15 is a scratch reg, using that as
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a frame pointer is a pretty doofus thing to do. use r5 instead, and
mark it callee-saved, coz that's what it is!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25526 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-23 06:08:46 +00:00
Duraid Madina
a0a11d289d
update tablegen files - nothing to see here
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24939 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-22 03:56:03 +00:00
Chris Lattner
0a37960d32
these registers don't belong to any register classes, so don't mark them
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as callee save. They can never be generated by the compiler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23551 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 06:42:24 +00:00
Duraid Madina
b70c2f3ef7
lie a bit and say that r1/r12 (GP/SP) _aren't_ callee-save, as we take
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care of this ourselves
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21110 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-06 06:18:36 +00:00
Duraid Madina
9b9d45f60e
and so it begins...
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PHASE 1: write instruction selector
PHASE 2: ???
PHASE 3: profit!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20652 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-17 18:17:03 +00:00
