Commit Graph

92705 Commits

Author SHA1 Message Date
Nick Lewycky
e4546cb71e When determining the new index for an insertelement, we may not assume that an
index greater than the size of the vector is invalid. The shuffle may be
shrinking the size of the vector. Fixes a crash!

Also drop the maximum recursion depth of the safety check for this
optimization to five.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183080 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-01 20:51:31 +00:00
Venkatraman Govindaraju
a0b34d6c4a Sparc: Mark functions calling llvm.vastart and llvm.returnaddress intrinsics as non-leaf functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183079 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-01 20:42:48 +00:00
David Majnemer
f7dad7833c SimplifyCFG: Fix typo in comment for ComputeSpeculationCost
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183078 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-01 19:43:23 +00:00
Benjamin Kramer
7c2b4be2a7 Move getRealLinkageName to a common place and remove all the duplicates of it.
Also simplify code a bit while there. No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183076 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-01 17:51:14 +00:00
Benjamin Kramer
6dd56e60b0 Move object construction into [] so the temporary can be moved.
No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183075 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-01 17:51:03 +00:00
Benjamin Kramer
da8b91a073 DenseMap: Move the key into place when we use the move version of operator[].
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183074 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-01 16:37:55 +00:00
Benjamin Kramer
8e851920c0 APInt: Simplify code. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183073 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-01 11:26:39 +00:00
Benjamin Kramer
77e5c2a179 APFloat: Use isDenormal instead of hand-rolled code to check for denormals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183072 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-01 11:26:33 +00:00
Tim Northover
95a565a063 Disable new legacy JIT test on ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183071 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-01 10:24:11 +00:00
Tim Northover
3ba14fab1b Revert r183069: "TMP: LEA64_32r fixing"
Very sorry, it was committed from the wrong branch by mistake.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183070 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-01 10:23:46 +00:00
Tim Northover
4d3ace4da0 TMP: LEA64_32r fixing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183069 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-01 10:21:54 +00:00
Tim Northover
85c622d6b6 X86: change MOV64ri64i32 into MOV32ri64
The MOV64ri64i32 instruction required hacky MCInst lowering because it
was allocated as setting a GR64, but the eventual instruction ("movl")
only set a GR32. This converts it into a so-called "MOV32ri64" which
still accepts a (appropriate) 64-bit immediate but defines a GR32.
This is then converted to the full GR64 by a SUBREG_TO_REG operation,
thus keeping everyone happy.

This fixes a typo in the opcode field of the original patch, which
should make the legact JIT work again (& adds test for that problem).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183068 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-01 09:55:14 +00:00
Venkatraman Govindaraju
72ad17c48c [Sparc] Generate correct code for leaf functions with stack objects
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183067 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-01 04:51:18 +00:00
Michael Gottesman
2e2922cd90 Removed a comment above an include which is unnecessary and added a missing closing @} for a doxygen comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183065 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-01 00:48:24 +00:00
Michael Gottesman
8a70f5815d Added method comments for getZero,getInf.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183064 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-01 00:44:29 +00:00
Michael Gottesman
7f88a3b20d Updated APFloat's comments to fit the LLVM style guide.
Also added a few more method comments and performed some copy editing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183063 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-01 00:44:05 +00:00
Ahmed Bougacha
23ed37a6b7 Make SubRegIndex size mandatory, following r183020.
This also makes TableGen able to compute sizes/offsets of synthesized
indices representing tuples.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183061 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 23:45:26 +00:00
Andrew Trick
cd8e3c4dcf Prevent loop-unroll from making assumptions about undefined behavior.
Fixes rdar:14036816, PR16130.

There is an opportunity to compute precise trip counts for 'or'
expressions and multi-exit loops.
rdar:14038809: Optimize trip count computation for multi-exit loops.

To do this we need to record the fact that ExitLimit assumes NSW. When
it does not we can safely assume that the loop trip count is the
minimum ExitLimt across all subexpressions and loop exits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183060 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 23:34:46 +00:00
Eric Christopher
34431085de Temporarily Revert "X86: change MOV64ri64i32 into MOV32ri64" as it
seems to have caused PR16192 and other JIT related failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183059 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 23:30:45 +00:00
Eric Christopher
813419ed5a Const-ify some printing and dumping code for DIEValues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183057 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 22:50:40 +00:00
Eric Christopher
769d24a60d Add support for adding the contents of a StringRef to the MD5 hash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183054 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 22:34:56 +00:00
Eric Christopher
cbb45aa123 Convert more unsigned char -> uint8_t.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183053 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 22:34:52 +00:00
Eric Christopher
92bd43bd4b Fix comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183052 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 22:34:48 +00:00
Eric Christopher
800e6ee52f Move "unsigned char" -> "uint8_t".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183051 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 22:34:34 +00:00
Arnold Schwaighofer
35b4cf868e LoopVectorize: Change API call to get the backedge taken count
Use ScalarEvolution's getBackedgeTakenCount API instead of getExitCount since
that is really what we want to know. Using the more specific getExitCount was
safe because we made sure that there is only one exiting block.

No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183047 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 21:48:56 +00:00
Quentin Colombet
06f5ebc5a1 Loop Strength Reduce: Scaling factor cost.
Account for the cost of scaling factor in Loop Strength Reduce when rating the
formulae. This uses a target hook.

The default implementation of the hook is: if the addressing mode is legal, the
scaling factor is free.

<rdar://problem/13806271>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183045 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 21:29:03 +00:00
Rafael Espindola
e17388fd34 Use just a ArrayRef<uint8_t> to store both hex string and binary data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183043 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 21:03:51 +00:00
Rafael Espindola
06120815a2 Rename COFFYaml.h to COFFYAML.h for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183042 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 20:38:27 +00:00
Rafael Espindola
0e07d1a93d Remove union to fix build in c++03.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183041 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 20:35:58 +00:00
Rafael Espindola
05bc4a6f20 Don't allocate temporary string for section data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183040 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 20:26:44 +00:00
Arnold Schwaighofer
47afc19625 LoopVectorize: PHIs with only outside users should prevent vectorization
We check that instructions in the loop don't have outside users (except if
they are reduction values). Unfortunately, we skipped this check for
if-convertable PHIs.

Fixes PR16184.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183035 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 19:53:50 +00:00
Benjamin Kramer
488401e9c9 NVPTX: Don't even create a regalloc if we're not going to use it.
Fixes a leak found by valgrind.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183031 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 19:21:58 +00:00
Michael Gottesman
504e2da08c [APFloat] Added a unittest for APFloat::getZero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183028 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 18:43:34 +00:00
Quentin Colombet
5b00f4edcb Modify how the formulae are rated in Loop Strength Reduce.
Namely, check if the target allows to fold more that one register in the
addressing mode and if yes, adjust the cost accordingly.

Prior to this commit, reg1 + scale * reg2 accesses were artificially preferred
to reg1 + reg2 accesses. Indeed, the cost model wrongly assumed that reg1 + reg2
needs a temporary register for the computation, whereas it was correctly
estimated for reg1 + scale * reg2.

<rdar://problem/13973908>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183021 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 17:20:29 +00:00
Ahmed Bougacha
bed2308186 Add a way to define the bit range covered by a SubRegIndex.
NOTE: If this broke your out-of-tree backend, in *RegisterInfo.td, change
the instances of SubRegIndex that have a comps template arg to use the
ComposedSubRegIndex class instead.

In TableGen land, this adds Size and Offset attributes to SubRegIndex,
and the ComposedSubRegIndex class, for which the Size and Offset are
computed by TableGen. This also adds an accessor in MCRegisterInfo, and
Size/Offsets for the X86 and ARM subreg indices.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183020 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 17:08:36 +00:00
Andrew Trick
9c8e1f93b4 Unit test for SCEV fix r182989, PR16130.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183017 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 16:42:41 +00:00
Kai Nacke
52aaf6a4a9 Remove useless code from transitioning to new EH scheme
Removes all uses of the variable UsesNewEH. Simply return false in case that no
resume instructions were found.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183016 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 16:30:36 +00:00
Tim Northover
ee5e24cb3e ARM: permit upper-case BE/LE on setend instruction
Patch by Amaury de la Vieuville.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183012 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 15:58:45 +00:00
Tim Northover
242c9f4615 ARM: add fstmx and fldmx instructions for assembly
These instructions are deprecated oddities, but we still need to be able to
disassemble (and reassemble) them if and when they're encountered.

Patch by Amaury de la Vieuville.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183011 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 15:55:51 +00:00
Rafael Espindola
4f3d7eea04 Simplify multiplications by vectors whose elements are powers of 2.
Patch by Andrea Di Biagio.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183005 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 14:27:15 +00:00
Tim Northover
e93c701cac ARM: fix VEXT encoding corner case
The disassembly of VEXT instructions was too lax in the bits checked. This
fixes the case where the instruction affects Q-registers but a misaligned lane
was specified (should be UNDEFINED).

Patch by Amaury de la Vieuville

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183003 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 13:47:25 +00:00
Richard Sandiford
b6606e46ab [SystemZ] Don't use LOAD and STORE REVERSED for volatile accesses
Unlike most -- hopefully "all other", but I'm still checking -- memory
instructions we support, LOAD REVERSED and STORE REVERSED may access
the memory location several times.  This means that they are not suitable
for volatile loads and stores.

This patch is a prerequisite for better atomic load and store support.
The same principle applies there: almost all memory instructions we
support are inherently atomic ("block concurrent"), but LOAD REVERSED
and STORE REVERSED are exceptions.

Other instructions continue to allow volatile operands.  I will add
positive "allows volatile" tests at the same time as the "allows atomic
load or store" tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183002 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 13:25:22 +00:00
Justin Holewinski
5443e7d790 [NVPTX] Re-enable support for virtual registers in the final output
Now that 3.3 is branched, we are re-enabling virtual registers to help
iron out bugs before the next release. Some of the post-RA passes do
not play well with virtual registers, so we disable them for now. The
needed functionality of the PrologEpilogInserter pass is copied to a
new backend-specific NVPTXPrologEpilog pass.

The test for this commit is not breaking the existing tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182998 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 12:14:49 +00:00
Evgeniy Stepanov
7ae921dbec [msan] Handle mixed track-origins and keep-going settings (llvm part).
Before this change, each module defined a weak_odr global __msan_track_origins 
with a value of 1 if origin tracking is enabled, 0 if disabled. If there are 
modules with different values, any of them may win. If 0 wins, and there is at 
least one module with 1, the program will most likely crash.

With this change, __msan_track_origins is only emitted if origin tracking is 
on. Then runtime library detects if there is at least one module with origin 
tracking, and enables runtime support for it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182997 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 12:04:29 +00:00
Tim Northover
43887bf3e6 X86: change MOV64ri64i32 into MOV32ri64
The MOV64ri64i32 instruction required hacky MCInst lowering because it was
allocated as setting a GR64, but the eventual instruction ("movl") only set a
GR32. This converts it into a so-called "MOV32ri64" which still accepts a
(appropriate) 64-bit immediate but defines a GR32. This is then converted to
the full GR64 by a SUBREG_TO_REG operation, thus keeping everyone happy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182991 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 09:57:13 +00:00
Richard Sandiford
5434f123e9 Add links to the System z architecture manual and ABI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182990 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 09:14:54 +00:00
Andrew Trick
616011418e Fix ScalarEvolution::ComputeExitLimitFromCond for 'or' conditions.
Fixes PR16130 - clang produces incorrect code with loop/expression at -O2.

This is a 2+ year old bug that's now holding up the release. It's a
case where we knowingly made aggressive assumptions about undefined
behavior. These assumptions are wrong when SCEV is computing a
subexpression that does not directly control the branch. With this
fix, we avoid making assumptions in those cases but still optimize the
common case. SCEV's trip count computation for exits controlled by
'or' expressions is now analagous to the trip count computation for
loops with multiple exits. I had already fixed the multiple exit case
to be conservative.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182989 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 06:43:25 +00:00
Akira Hatanaka
affed7e11d [mips] Big-endian code generation for atomic instructions.
Patch by Jyun-Yan You.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182984 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 03:25:44 +00:00
Matt Arsenault
04b0bcf7b1 Fix wrong comment. Null is not acceptable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182979 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 01:40:30 +00:00
Nick Lewycky
903f26d904 Reapply with r182909 with a fix to the calculation of the new indices for
insertelement instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182976 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 00:59:42 +00:00