Commit Graph

4 Commits

Author SHA1 Message Date
Dan Gohman
ae3a0be92e Split the Add, Sub, and Mul instruction opcodes into separate
integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.

For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.

This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-04 22:49:04 +00:00
Evan Cheng
073c5b721d Don't mask the isel bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47018 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-12 19:11:29 +00:00
Evan Cheng
65b2e3df0d Fix some test cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46998 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-12 07:22:46 +00:00
Dan Gohman
02e4fa7d5f Strength reduction improvements.
- Avoid attempting stride-reuse in the case that there are users that
   aren't addresses. In that case, there will be places where the
   multiplications won't be folded away, so it's better to try to
   strength-reduce them.

 - Several SSE intrinsics have operands that strength-reduction can
   treat as addresses. The previous item makes this more visible, as
   any non-address use of an IV can inhibit stride-reuse.

 - Make ValidStride aware of whether there's likely to be a base
   register in the address computation. This prevents it from thinking
   that things like stride 9 are valid on x86 when the base register is
   already occupied.

Also, XFAIL the 2007-08-10-LEA16Use32.ll test; the new logic to avoid
stride-reuse elimintes the LEA in the loop, so the test is no longer
testing what it was intended to test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43231 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-22 20:40:42 +00:00