332 Commits

Author SHA1 Message Date
Rafael Espindola
c7c4c36694 Split the object streamer callback in one per file format.
There are two main advantages to doing this

* Targets that only need to handle one of the formats specially don't have
  to worry about the others. For example, x86 now only registers a
  constructor for the COFF streamer.

* Changes to the arguments passed to one format constructor will not impact
  the other formats.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232699 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-19 01:50:16 +00:00
Rafael Espindola
64d662ba93 two or more, use a for.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232688 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 23:15:49 +00:00
Rafael Espindola
7b8bb89ecd Pass in a "const Triple &T" instead of a raw StringRef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232429 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 22:29:29 +00:00
Rafael Espindola
63641de2e6 Remove unused argument. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232428 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 22:06:15 +00:00
Rafael Espindola
9130d115d6 There is only one Asm streamer, there is no need for targets to register it.
Instead, have the targets register a TargetStreamer to be use with the
asm streamer (if any).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232423 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 21:43:42 +00:00
David Blaikie
7610ba7d24 Fix uses of reserved identifiers starting with an underscore followed by an uppercase letter
This covers essentially all of llvm's headers and libs. One or two weird
cases I wasn't sure were worth/appropriate to fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232394 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 18:06:57 +00:00
Daniel Sanders
547ba56bd0 Recommit r232027 with PR22883 fixed: Add infrastructure for support of multiple memory constraints.
The operand flag word for ISD::INLINEASM nodes now contains a 15-bit
memory constraint ID when the operand kind is Kind_Mem. This constraint
ID is a numeric equivalent to the constraint code string and is converted
with a target specific hook in TargetLowering.

This patch maps all memory constraints to InlineAsm::Constraint_m so there
is no functional change at this point. It just proves that using these
previously unused bits in the encoding of the flag word doesn't break
anything.

The next patch will make each target preserve the current mapping of
everything to Constraint_m for itself while changing the target independent
implementation of the hook to return Constraint_Unknown appropriately. Each
target will then be adapted in separate patches to use appropriate
Constraint_* values.

PR22883 was caused the matching operands copying the whole of the operand flags
for the matched operand. This included the constraint id which needed to be
replaced with the operand number. This has been fixed with a conversion
function. Following on from this, matching operands also used the operand
number as the constraint id. This has been fixed by looking up the matched
operand and taking it from there. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232165 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-13 12:45:09 +00:00
Toma Tabacu
4716d39f4d [mips] [IAS] Refactor MipsTargetStreamer::emitMipsAbiFlags(). NFC.
Summary: Make emitMipsAbiFlags a direct member of MipsTargetELFStreamer, as that's the only place where it's used, and remove the empty implementations from MipsTargetStreamer and MipsTargetAsmStreamer.

Reviewers: dsanders, rafael

Reviewed By: rafael

Subscribers: rafael, llvm-commits

Differential Revision: http://reviews.llvm.org/D8199

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232161 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-13 11:40:01 +00:00
Eric Christopher
57849e3bb4 Remove the use of the subtarget in MCCodeEmitter creation and
update all ports accordingly. Required a couple of small rewrites
in handling subtarget features during creation in PPC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231861 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-10 22:03:14 +00:00
Eric Christopher
91b5e11071 Remove an unused variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231730 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-10 00:33:22 +00:00
Toma Tabacu
25c2850952 [mips] [IAS] Add missing constraints and improve testing for the .module directive.
Summary:
None of the .set directives can be used before the .module directives. The .set mips0/pop/push were not triggering this constraint.
Also added testing for all the other implemented directives which are supposed to trigger this constraint.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D7140

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231465 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 12:15:12 +00:00
Michael Kuperstein
2b5910a767 Reverting r229831 due to multiple ARM/PPC/MIPS build-bot failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229841 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 11:38:11 +00:00
Michael Kuperstein
23dd089d8f Use std::bitset for SubtargetFeatures
Previously, subtarget features were a bitfield with the underlying type being uint64_t. 
Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset.

No functional change.

Differential Revision: http://reviews.llvm.org/D7065

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229831 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 09:01:04 +00:00
Peter Collingbourne
d93ca09fe0 MC: Remove NullStreamer hook, as it is redundant with NullTargetStreamer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229799 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 00:45:07 +00:00
Daniel Sanders
7eedd07d5e [mips] Add backend support for Mips32r[35] and Mips64r[35].
Summary:
These ISA's didn't add any instructions so they are almost identical to
Mips32r2 and Mips64r2. Even the ELF e_flags are the same, However the ISA
revision in .MIPS.abiflags is 3 or 5 respectively instead of 2.

Reviewers: vmedic

Reviewed By: vmedic

Subscribers: tomatabacu, llvm-commits, atanasyan

Differential Revision: http://reviews.llvm.org/D7381


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229695 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 16:24:50 +00:00
Toma Tabacu
227affe405 [mips] [IAS] Fix using .cpsetup with local labels (PR22518).
Summary:
Parse for an MCExpr instead of an Identifier and use the symbol for relocations, not just the symbol's name.

This fixes errors when using local labels in .cpsetup (PR22518).

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: seanbruno, emaste, llvm-commits

Differential Revision: http://reviews.llvm.org/D7697

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229671 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 13:46:53 +00:00
Eric Christopher
68499a2f20 Unify selectMipsCPU implementations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229595 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 00:55:06 +00:00
Simon Atanasyan
ca64d76c1b [Mips] Add .MIPS.options section descriptor kinds enumeration
No functional changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229452 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-16 22:59:29 +00:00
Aaron Ballman
66981fe208 Removing LLVM_DELETED_FUNCTION, as MSVC 2012 was the last reason for requiring the macro. NFC; LLVM edition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229340 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-15 22:54:22 +00:00
Toma Tabacu
94b64060af [mips] Improve support for the .set at/noat assembler directives.
Summary:
Made the following changes:
  Added calls to emitDirectiveSetNoAt() and emitDirectiveSetAt().
  Added special emit function for .set at=$reg, emitDirectiveSetAtWithArg(unsigned RegNo).
  Improved parsing error checks for .set at.
  Refactored parser code for .set at.
  Improved testing of both directives.
  Improved code readability and comments.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D7176

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229097 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-13 10:30:57 +00:00
Chandler Carruth
02d6288667 Re-sort #include lines using my handy dandy ./utils/sort_includes.py
script. This is in preparation for changes to lots of include lines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229088 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-13 09:09:03 +00:00
Zoran Jovanovic
3c53772000 [mips][microMIPS] Implement movep instruction
Differential Revision: http://reviews.llvm.org/D7465


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228703 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-10 16:36:20 +00:00
Rafael Espindola
9936b80df5 Compute the ELF SectionKind from the flags.
Any code creating an MCSectionELF knows ELF and already provides the flags.

SectionKind is an abstraction used by common code that uses a plain
MCSection.

Use the flags to compute the SectionKind. This removes a lot of
guessing and boilerplate from the MCSectionELF construction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227476 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-29 17:33:21 +00:00
Jozef Kolek
a8c8e06c02 [mips][microMIPS] Implement LWGP instruction
Differential Revision: http://reviews.llvm.org/D6650


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227325 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 17:27:26 +00:00
Eric Christopher
fcd3c4065d Move the Mips target to storing the ABI in the TargetMachine rather
than on MipsSubtargetInfo.

This required a bit of massaging in the MC level to handle this since
MC is a) largely a collection of disparate classes with no hierarchy,
and b) there's no overarching equivalent to the TargetMachine, instead
only the subtarget via MCSubtargetInfo (which is the base class of
TargetSubtargetInfo).

We're now storing the ABI in both the TargetMachine level and in the
MC level because the AsmParser and the TargetStreamer both need to
know what ABI we have to parse assembly and emit objects. The target
streamer has a pointer to the one in the asm parser and is updated
when the asm parser is created. This is fragile as the FIXME comment
notes, but shouldn't be a problem in practice since we always
create an asm parser before attempting to emit object code via the
assembler. The TargetMachine now contains the ABI so that the DataLayout
can be constructed dependent upon ABI.

All testcases have been updated to use the -target-abi command line
flag so that we can set the ABI without using a subtarget feature.

Should be no change visible externally here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227102 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 17:33:46 +00:00
Eric Christopher
56471c4aec Correct the header guard for MipsABIInfo.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227076 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 08:19:53 +00:00
Jozef Kolek
db8552c834 [mips][microMIPS] MicroMIPS 16-bit unconditional branch instruction B
Implement microMIPS 16-bit unconditional branch instruction B.

Implemented 16-bit microMIPS unconditional instruction has real name B16, and
B is an alias which expands to either B16 or BEQ according to the rules:
b 256 --> b16 256 # R_MICROMIPS_PC10_S1
b 12256 --> beq $zero, $zero, 12256 # R_MICROMIPS_PC16_S1
b label --> beq $zero, $zero, label # R_MICROMIPS_PC16_S1

Differential Revision: http://reviews.llvm.org/D3514


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226657 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 12:39:30 +00:00
Jozef Kolek
16dbcd741f [mips][microMIPS] Implement ADDIUPC instruction
Differential Revision: http://reviews.llvm.org/D6582


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226656 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 12:10:11 +00:00
Jozef Kolek
8832c6b91e Reverted revision 226577.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226595 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-20 19:29:28 +00:00
Jozef Kolek
617b574ffb [mips][microMIPS] MicroMIPS 16-bit unconditional branch instruction B
Implement microMIPS 16-bit unconditional branch instruction B.

Implemented 16-bit microMIPS unconditional instruction has real name B16, and
B is an alias which expands to either B16 or BEQ according to the rules:
b 256 --> b16 256 # R_MICROMIPS_PC10_S1
b 12256 --> beq $zero, $zero, 12256 # R_MICROMIPS_PC16_S1
b label --> beq $zero, $zero, label # R_MICROMIPS_PC16_S1

Differential Revision: http://reviews.llvm.org/D3514


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226577 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-20 16:45:27 +00:00
Chandler Carruth
1b279144ec [cleanup] Re-sort all the #include lines in LLVM using
utils/sort_includes.py.

I clearly haven't done this in a while, so more changed than usual. This
even uncovered a missing include from the InstrProf library that I've
added. No functionality changed here, just mechanical cleanup of the
include order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225974 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 11:23:27 +00:00
Jozef Kolek
ad017096fc [mips][microMIPS] Implement BEQZ16 and BNEZ16 instructions
Differential Revision: http://reviews.llvm.org/D5271


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225627 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-12 12:03:34 +00:00
Zoran Jovanovic
25547ee83c [mips][microMIPS] Relocate with symbol for micromips symbols
Differential Revision: http://reviews.llvm.org/D6796


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225008 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-30 22:04:16 +00:00
Jozef Kolek
e5fa612e9e [mips][microMIPS] Implement LWSP and SWSP instructions
Differential Revision: http://reviews.llvm.org/D6416


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224771 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-23 16:16:33 +00:00
Vladimir Medic
73fb93cfaf MipsABIInfo class is used in different libraries. Moving the files to MCTargetDesc folder(LLVMMipsDesc library) prevents linkage errors. There are no functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224427 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-17 11:49:56 +00:00
Zoran Jovanovic
78f6aad800 [mips][microMIPS] Implement SWP and LWP instructions
Differential Revision: http://reviews.llvm.org/D5667


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224338 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-16 14:59:10 +00:00
Mohit K. Bhakkad
b284d4ae31 test commit (spelling correction)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223758 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 06:31:07 +00:00
Matt Arsenault
459e595697 Allow target to specify prefix for labels
Use the MCAsmInfo instead of the DataLayout, and allow
specifying a custom prefix for labels specifically. HSAIL
requires that labels begin with @, but global symbols with &.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223323 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-04 00:06:57 +00:00
Jozef Kolek
b087448a5f [mips][microMIPS] Implement NOP aliases
This patch implements microMIPS 16-bit (MOVE16 $0, $0) and
32-bit (SLL $0, $0, 0) NOP aliases.

http://reviews.llvm.org/D6440


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222953 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-29 13:29:24 +00:00
Zoran Jovanovic
7dc6143a82 [mips][microMIPS] Implement SWM16 and LWM16 instructions
Differential Revision: http://reviews.llvm.org/D5579


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222901 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-27 18:28:59 +00:00
Jozef Kolek
b955bed064 [mips][microMIPS] Implement LBU16, LHU16, LW16, SB16, SH16 and SW16 instructions
Differential Revision: http://reviews.llvm.org/D5122


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222653 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-24 14:39:13 +00:00
Zoran Jovanovic
d67cd80220 [mips][micromips] Implement SWM32 and LWM32 instructions
Differential Revision: http://reviews.llvm.org/D5519


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222367 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 16:44:02 +00:00
Jozef Kolek
c8ec320371 Test commit to verify that commit access works.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222244 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 19:20:34 +00:00
Zoran Jovanovic
8dad1e1e8e [mips][microMIPS] Implement ANDI16 instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221367 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 17:31:00 +00:00
Zoran Jovanovic
0f0a134d9d [mips][microMIPS] Mark symbols as microMIPS if necessary
Differential Revision: http://reviews.llvm.org/D6039


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221355 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 16:35:20 +00:00
Zoran Jovanovic
e9b9ca452f Reverted revisions 221351, 221352 and 221353.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221354 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 16:19:59 +00:00
Zoran Jovanovic
7c63a6331f [mips][microMIPS] Implement ANDI16 instruction
Differential Revision: http://reviews.llvm.org/D5163


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221351 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 15:39:41 +00:00
Zoran Jovanovic
71832e7ed9 [mips][microMIPS] Implement ADDIUR1SP instruction
Differential Revision: http://reviews.llvm.org/D5153


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220477 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-23 11:13:59 +00:00
Zoran Jovanovic
fd515137bc ps][microMIPS] Implement ADDIUR2 instruction
Differential Revision: http://reviews.llvm.org/D5151


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220476 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-23 11:06:34 +00:00
Zoran Jovanovic
558236adf0 [mips][microMIPS] Implement CodeGen support for SLL16 and SRL16 instructions
Differential Revision: http://reviews.llvm.org/D5774


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220474 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-23 10:42:01 +00:00