Commit Graph

29008 Commits

Author SHA1 Message Date
Reid Kleckner
4c27f8d49e Reland r229944: EH: Prune unreachable resume instructions during Dwarf EH preparation
Fix the double-deletion of AnalysisResolver when delegating through to
Dwarf EH preparation by creating one from scratch. Hopefully the new
pass manager simplifies this.

This reverts commit r229952.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231719 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 22:45:16 +00:00
Rafael Espindola
9e065f52fc Use a MapVector instead of an extra sort.
This also has the advantage of not depending on the brittle getLabelBeginName.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231714 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 22:08:37 +00:00
Colin LeMahieu
ffc2de43d9 [Hexagon] Reapply r231699. Remove assumption that second operand is an immediate when checking if A2_tfrsi is combinable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231710 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 21:48:13 +00:00
Sanjoy Das
cd5029d001 [SCEV] Unify getUnsignedRange and getSignedRange
Summary:
This removes some duplicated code, and also helps optimization: e.g. in
the test case added, `%idx ULT 128` in `@x` is not currently optimized
to `true` by `-indvars` but will be, after this change.

The only functional change in ths commit is that for add recurrences,
ScalarEvolution::getRange will be more aggressive -- computing the
unsigned (resp. signed) range for a SCEVAddRecExpr will now look at the
NSW (resp. NUW) bits and check for signed (resp. unsigned) overflow.
This can be a strict improvement in some cases (such as the attached
test case), and should be no worse in other cases.

Reviewers: atrick, nlewycky

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8142

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231709 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 21:43:43 +00:00
Sanjoy Das
afeb9bf44e [SCEV] Add a `scalar-evolution-print-constant-ranges' option
Summary:
Unused in this commit, but will be used in a subsequent change (D8142)
by a FileCheck test.

Reviewers: atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8143

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231708 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 21:43:39 +00:00
Colin LeMahieu
c2d30aebf3 [Hexagon] Reverting r231699
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231703 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 21:19:02 +00:00
Colin LeMahieu
8c2919a34e [Hexagon] Updating constant set to simpler versions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231699 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 20:33:12 +00:00
Rafael Espindola
905c6fb424 Don't prime the section map.
This was just creating unused labels for .text when the module had no
functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231694 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 20:09:58 +00:00
Colin LeMahieu
a0ce232a65 [Hexagon] Eliminating immediate condition set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231693 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 19:57:18 +00:00
Justin Bogner
05b74bc4a6 InstrProf: Use the proftext format for these coverage tests
This format's easier to understand and update by hand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231686 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 18:54:58 +00:00
Justin Bogner
cbbfb05179 InstrProf: Allow hexadecimal function hashes in proftext format
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231685 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 18:54:49 +00:00
Rafael Espindola
be886690bd Print jump tables before exception tables.
In the case where just tables are part of the function section, this produces
more readable assembly by avoiding switching to the eh section and back
to .text.

This would also break with non unique section names, as trying to switch to
a unique section actually creates a new one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231677 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 18:29:12 +00:00
Reed Kotler
18afdb3210 Add logical ops to Mips fast-isel
Summary:
Code is mostly copied from AArch64 port and modified where needed for Mips.

This handles the "non" legal cases of logical ops. Legal cases are handled by tablegen patterns.

Test Plan:
Make check test logopm.ll

All of test-suite passes at O0/O2 and mips32 r1/r2 with this new change.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: echristo, llvm-commits, aemerson, rfuhler

Differential Revision: http://reviews.llvm.org/D6599

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231665 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 16:28:10 +00:00
Marek Olsak
c4ca7b59db R600/SI: Limit SGPRs to 80 on Tonga and Iceland
This is a candidate for stable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231659 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 15:48:09 +00:00
Andrea Di Biagio
d1232fa1c0 Fix line ending in test CodeGen/X86/pr22774.ll. NFC.
Also, replaced line with 'target triple' with flag -mtriple on the RUN line.
Removed the data layout string as it is not needed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231654 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 15:02:01 +00:00
Kevin Qin
1428f080a8 Revert r231630 - Run LICM pass after loop unrolling pass.
As it broke llvm bootstrap.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231635 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 07:26:37 +00:00
Owen Anderson
8e120d80c3 Fix a bug in the LLParser where we failed to diagnose landingpads with non-constant clause operands.
Fixing this also exposed a related issue where the landingpad under construction was not
cleaned up when an error was raised, which would cause bad reference errors before the
error could actually be printed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231634 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 07:13:42 +00:00
Kevin Qin
40e66277f7 [AArch64] Enable partial & runtime unrolling on cortex-a57
For inner one of nested loops, it is more likely to be a hot loop,
and the runtime check can be promoted out from patch 0001, so the
overhead is less, we can try a doubled threshold to unroll more loops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231632 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 06:14:28 +00:00
Kevin Qin
994b4c784f Introduce runtime unrolling disable matadata and use it to mark the scalar loop from vectorization.
Runtime unrolling is an expensive optimization which can bring benefit
only if the loop is hot and iteration number is relatively large enough.
For some loops, we know they are not worth to be runtime unrolled.
The scalar loop from vectorization is one of the cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231631 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 06:14:18 +00:00
Kevin Qin
3836dd0315 Run LICM pass after loop unrolling pass.
Runtime unrollng will introduce a runtime check in loop prologue.
If the unrolled loop is a inner loop, then the proglogue will be inside
the outer loop. LICM pass can help to promote the runtime check out if
the checked value is loop invariant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231630 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 06:14:07 +00:00
Mehdi Amini
4c8f5afd99 InstCombine: fix fold "fcmp x, undef" to account for NaN
Summary:
See the two test cases.

; Can fold fcmp with undef on one side by choosing NaN for the undef

; Can fold fcmp with undef on both side
;   fcmp u_pred undef, undef -> true
;   fcmp o_pred undef, undef -> false
; because whatever you choose for the first undef
; you can choose NaN for the other undef

Reviewers: hfinkel, chandlerc, majnemer

Reviewed By: majnemer

Subscribers: majnemer, llvm-commits

Differential Revision: http://reviews.llvm.org/D7617

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231626 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 03:20:25 +00:00
Owen Anderson
c03496d4d0 Teach DataLayout to infer a plausible alignment for things even when nothing is specified by the user.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231613 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-08 21:53:59 +00:00
Andrea Di Biagio
692f7382b5 [X86][AVX] Fix wrong lowering of VPERM2X128 nodes
There were cases where the backend computed a wrong permute mask for a VPERM2X128 node.

Example:
\code
define <8 x float> @foo(<8 x float> %a, <8 x float> %b) {
  %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 undef, i32 undef, i32 6, i32 7, i32 undef, i32 undef, i32 6, i32 7>
  ret <8 x float> %shuffle
}
\code end

Before this patch, llc (with -mattr=+avx) emitted the following vperm2f128:
  vperm2f128 $0, %ymm0, %ymm0, %ymm0  # ymm0 = ymm0[0,1,0,1]

With this patch, llc emits a vperm2f128 with a correct permute mask:
  vperm2f128 $17, %ymm0, %ymm0, %ymm0  # ymm0 = ymm0[2,3,2,3]

Differential Revision: http://reviews.llvm.org/D8119


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231601 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-08 16:28:47 +00:00
David Majnemer
2c08439cf9 ExecutionEngine: Preliminary support for dynamically loadable coff objects
Provide basic support for dynamically loadable coff objects. Only handles a subset of x64 currently.

Patch by Andy Ayers!

Differential Revision: http://reviews.llvm.org/D7793

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231574 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-07 20:21:27 +00:00
Andrea Di Biagio
15d2c3fb00 [DAGCombiner] Fix wrong folding of AND dag nodes.
This patch fixes the logic in the DAGCombiner that folds an AND node according
to rule: (and (X (load V)), C) -> (X (load V))

An AND between a vector load 'X' and a constant build_vector 'C' can be folded
into the load itself only if we can prove that the AND operation is redundant.
The algorithm implemented by 'visitAND' firstly computes the splat value 'S'
from C, and then checks if S has the lower 'B' bits set (where B is the size in
bits of the vector element type). The algorithm takes into account also the
'undef' bits in the splat mask.

Unfortunately, the algorithm only worked under the assumption that the size of S
is a multiple of the vector element type. With this patch, we conservatively
avoid folding the AND if the splat bits are not compatible with the vector
element type.

Added X86 test and-load-fold.ll

Differential Revision: http://reviews.llvm.org/D8085


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231563 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-07 12:24:55 +00:00
Simon Pilgrim
62ba058dea [DAGCombiner] SCALAR_TO_VECTOR(EXTRACT_VECTOR_ELT(V,C)) -> VECTOR_SHUFFLE
This patch attempts to convert a SCALAR_TO_VECTOR using an operand from an EXTRACT_VECTOR_ELT into a VECTOR_SHUFFLE.

This prevents many cases of spilling scalar data between the gpr + simd registers. 

At present the optimization only accepts cases where there is no TRUNC of the scalar type (i.e. all types must match).

Differential Revision: http://reviews.llvm.org/D8132

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231554 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-07 05:52:42 +00:00
Eric Christopher
80d55e6bcb Remove use of misched-bench from this test and replace it with
non-temporary enabling options. This is part of removing misched-bench
as an option.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231546 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-07 01:39:06 +00:00
Frederic Riss
3c8e619a71 [dsymutil] Apply relocations to DIE data before cloning.
Doing this gets function's low_pc and global variable's locations right
in the output debug info. It also could get right other attributes
that need to be relocated (in linker terms), but I don't know of any
other than the address attributes.

This doesn't fixup low_pc attributes in compile_unit, lexical_block
or inlined subroutine, nor does it get right high_pc attributes
for function. This will come in a subsequent commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231544 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-07 01:25:09 +00:00
Eric Christopher
5dc2251b4e Recommit r231324 with a fix to the ARM execution domain code
to disable lane switching if we don't actually have the instruction
set we want to switch to. Models the earlier check above the
conditional for the pass.

The testcase is one that triggered with the assert that's added
as part of the fix, use it to avoid adding a new testcase as it
highlights the same problem.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231539 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-07 00:12:22 +00:00
Frederic Riss
fe78287585 [dsymutil] Support cloning DIE reference attributes.
Reference attributes are mainly handled by just creating DIEEntry
attributes for them. There is a special case for DW_FORM_ref_addr
attributes though, because the DIEEntry code needs a DwarfDebug
code to emit them (and we don't have one as we do no CodeGen).
In that case, just use DIEInteger attributes with the right form.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231531 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 23:22:53 +00:00
Olivier Sallenave
2f19fc85a4 Do not restrict interleaved unrolling to small loops, depending on the target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231528 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 23:12:04 +00:00
Quentin Colombet
05a3f9120a [AArch64][LoadStoreOptimizer] Generate LDP + SXTW instead of LD[U]R + LD[U]RSW.
Teach the load store optimizer how to sign extend a result of a load pair when
it helps creating more pairs.
The rational is that loads are more expensive than sign extensions, so if we
gather some in one instruction this is better!

<rdar://problem/20072968>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231527 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 22:42:10 +00:00
Sanjay Patel
5bac8f9b95 fixed to test features, not CPUs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231524 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 21:50:42 +00:00
Sanjay Patel
f528a40240 fixed to test features, not CPUs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231523 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 21:50:27 +00:00
Sanjay Patel
5ff9d3e6ed loosen checking for buildbots
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231522 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 21:30:18 +00:00
Sanjay Patel
aedb16fc6f fixed to test only the feature, not the feature and a CPU
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231521 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 21:24:56 +00:00
Sanjay Patel
b00a131bda fixed to test only the feature, not the feature and a CPU
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231520 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 21:19:32 +00:00
Sanjay Patel
50652e746b fixed test to use FileCheck
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231519 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 21:16:15 +00:00
Sanjay Patel
6deb05e63a fixed to use CHECK-LABELs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231517 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 21:05:02 +00:00
Sanjay Patel
d532d10275 fixed to test only the feature, not the feature and a CPU
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231516 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 20:58:15 +00:00
Sanjay Patel
f2b34a568b fixed to test only the feature, not the feature and a CPU
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231515 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 20:57:40 +00:00
Sanjay Patel
9e03e85cac fixed to test feature, not CPU
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231513 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 20:51:25 +00:00
Sanjay Patel
17392758a1 fixed to test features, not CPUs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231512 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 20:46:16 +00:00
Sanjay Patel
91b79125ec fixed test to use SSE2 attribute
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231510 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 20:38:55 +00:00
Sanjay Patel
e7abe0cdbc fixed to test only the feature, not the feature and a CPU
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231509 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 20:34:20 +00:00
Matthias Braun
47941aa098 DAGCombiner: Canonicalize select(and/or,x,y) depending on target.
This is based on the following equivalences:
select(C0 & C1, X, Y) <=> select(C0, select(C1, X, Y), Y)
select(C0 | C1, X, Y) <=> select(C0, X, select(C1, X, Y))

Many target cannot perform and/or on the CPU flags and therefore the
right side should be choosen to avoid materializign the i1 flags in an
integer register. If the target can perform this operation efficiently
we normalize to the left form.

Differential Revision: http://reviews.llvm.org/D7622

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231507 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 19:49:10 +00:00
Bruno Cardoso Lopes
664388cd2a [AsmPrinter][TLOF] Remove AArch64 test to appease buildbots
Follow up from r231497. Using XFAIL would still trigger fail on some
buildbots. Will re-introduce it as soon as I have a fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231505 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 19:42:18 +00:00
Bruno Cardoso Lopes
83f6fece72 [AsmPrinter][TLOF] XFAIL AArch64 test to appease buildbots
The checking for extgotequiv and localgotequiv rely on the emission
order, which is not guaranteed because we use DenseMap to hold the GOT
equivalents. XFAIL this now until I get time to use MapVector and test
out the solution. In the meantime, appease buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231497 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 18:38:42 +00:00
Frederic Riss
98ecf5a7ed [dsymutil] Add debug_str construction support.
With this comes the ability to correctly clone string attributes in DIEs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231493 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 17:56:30 +00:00
Bruno Cardoso Lopes
653997ebc2 [AsmPrinter][TLOF] Make AArch64 test a bit more flexible
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231481 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 15:11:41 +00:00