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Author SHA1 Message Date
Tom Stellard
38d5e1c36d R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2 
Using REG_SEQUENCE for BUILD_VECTOR rather than a series of INSERT_SUBREG
instructions should make it easier for the register allocator to coalasce
unnecessary copies.

v2:
  - Use an SGPR register class if all the operands of BUILD_VECTOR are
    SGPRs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188427 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-14 23:24:32 +00:00