Commit Graph

85407 Commits

Author SHA1 Message Date
Benjamin Kramer
53347ed2f8 Make backtraces work again with both the configure and cmake build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164817 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-28 10:10:46 +00:00
Benjamin Kramer
ab16423c91 GlobalOpt: non-constexpr bitcasts or GEPs can occur even if the global value is only stored once.
Fixes PR13968.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164815 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-28 10:01:27 +00:00
Nick Lewycky
7e0e166d17 Surprisingly, we missed a trivial case here. Fix that!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164814 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-28 09:33:53 +00:00
Craig Topper
8bb12aeeb4 Remove a LLVM_DELETED_FUNCTION from destructor to fix -std=c++11 build on gcc 4.7.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164813 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-28 07:17:01 +00:00
Reed Kotler
c94a38ff17 1. Add load/store words from the stack
2. As part of this, added assembly format FEXT_RI16_SP_explicit_ins and
moved other lines for FEXT_RI16 formats to be in the right place in the code.
3. Added mayLoad and mayStore assignements for the load/store instructions added and for ones already there that did not have this assignment.
4. Another patch will deal with the problem of load/store byte/halfword to the stack. This is a particular Mips16 problem.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164811 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-28 02:26:24 +00:00
Jakob Stoklund Olesen
83ef63efce Remove <def,read-undef> flags from partial redefinitions.
The new coalescer can turn a full virtual register definition into a
partial redef by merging another value into an unused vector lane.

Make sure to clear the <read-undef> flag on such defs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164807 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 23:31:32 +00:00
Micah Villmow
6f6ea93c92 Fix more crlf issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164805 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 22:14:10 +00:00
Meador Inge
ce71822d38 instcombine: Add more test cases for __strncpy_chk simplification
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164800 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 21:21:31 +00:00
Meador Inge
a968582978 instcombine: Add more test cases for __strcpy_chk simplification
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164799 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 21:21:28 +00:00
Meador Inge
c8613c9089 instcombine: Add more test cases for __memmove_chk simplification
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164798 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 21:21:25 +00:00
Meador Inge
012ffd251b instcombine: Add more test cases for __memcpy_chk simplification
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164797 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 21:21:21 +00:00
Meador Inge
910c564d3b instcombine: Add more test cases for __memset_chk simplification
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164796 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 21:21:18 +00:00
Jakob Stoklund Olesen
5cf178f281 Enable the new coalescer algorithm by default.
The new coalescer is better at merging values into unused vector lanes,
improving NEON code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164794 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 21:06:02 +00:00
Jakob Stoklund Olesen
657720bc6e Don't dereference begin() on an empty vector.
The fix is obvious and the only test case I have is horrible, so I am
not including it. The problem shows up when self-hosting clang on i386
with -new-coalescer enabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164793 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 21:05:59 +00:00
Akira Hatanaka
cb39aa05af MIPS DSP: ABSQ_S.PH instruction sub-class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164787 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 19:09:21 +00:00
Akira Hatanaka
23bb38f034 MIPS DSP: SHLL.QB instruction sub-class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164786 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 19:05:08 +00:00
Benjamin Kramer
465251a7ce Fix a integer overflow in SimplifyCFG's look up table formation logic.
If the width is very large it gets truncated from uint64_t to uint32_t when
passed to TD->fitsInLegalInteger. The truncated value can fit in a register.
This manifested in massive memory usage or crashes (PR13946).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164784 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 18:29:58 +00:00
Micah Villmow
593c0b08e6 Fix CRLF issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164782 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 17:51:02 +00:00
Jakob Stoklund Olesen
ddc26d8936 Avoid dereferencing a NULL pointer.
Fixes PR13943.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164778 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 16:34:19 +00:00
Micah Villmow
7149ef0176 Patch for HowToBuildOnARM documentation from Wei-Ren Chen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164776 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 15:05:49 +00:00
Sylvestre Ledru
94c22716d6 Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. See: http://en.wikipedia.org/wiki/If_and_only_if Commit 164767
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164768 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 10:14:43 +00:00
Sylvestre Ledru
7e2c793a2b Fix a typo 'iff' => 'if'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164767 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 09:59:43 +00:00
Nick Lewycky
466e0f38d3 Prefer shuffles to selects. Backends love shuffles!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164763 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 08:33:56 +00:00
Bill Wendling
37d3ef3140 Add constructors to the attribute builder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164762 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 07:22:30 +00:00
Nick Lewycky
e2d02349c3 Add missing function CreateFPCast to the TargetFolder. It's there in the other
folders and not having it here fails to compile if you actually try to use it.

Also, CreatePointerCast was failing to do the part where it does TD-aware
constant folding. Granted there is exactly one case where that it will ever
do anything, but there's no reason to skip it. For reference, that case is a
subtraction between two constant offsets on the same global variable, eg.,
"&A[123] - &A[4].f".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164760 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 06:33:40 +00:00
Jush Lu
8f50647662 [arm-fast-isel] Add support for ELF PIC.
This is a preliminary step towards ELF support; currently ARMFastISel hasn't
been used for ELF object files yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164759 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 05:21:41 +00:00
Akira Hatanaka
5e92990703 Test case for r164755 and 164756.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164757 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 04:12:30 +00:00
Akira Hatanaka
833f7a5c4b MIPS DSP: rddsp (instruction which reads DSPControl register fields to a GPR).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164756 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 04:08:42 +00:00
Akira Hatanaka
451b0e7b8a MIPS DSP: CMPU.EQ.QB instruction sub-class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164755 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 03:58:34 +00:00
Akira Hatanaka
a216401621 MIPS DSP: ADDU.QB instruction sub-class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164754 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 03:13:59 +00:00
Akira Hatanaka
01f7089bca MIPS DSP: Branch on Greater Than or Equal To Value 32 in DSPControl Pos Field instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164751 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 02:15:57 +00:00
Akira Hatanaka
2df483efb3 MIPS DSP: all the remaining instructions which read or write accumulators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164750 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 02:11:20 +00:00
Akira Hatanaka
fd89e6ffda MIPS DSP: add support for extract-word instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164749 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 02:05:42 +00:00
Akira Hatanaka
5e69cef21b MIPS DSP: add functions which decode DSP and accumulator registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164748 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 02:01:10 +00:00
Akira Hatanaka
cc46fe591a MIPS DSP: add code necessary for pseudo instruction lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164747 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 01:59:07 +00:00
Akira Hatanaka
7e105bcc3a MIPS DSP: add bitcast patterns between vectors and int.
No test cases. These patterns will get tested along with dsp intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164746 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 01:56:38 +00:00
Akira Hatanaka
7509ec18d1 MIPS DSP: add vector load/store patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164744 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 01:50:59 +00:00
Andrew Kaylor
44aebe85e3 Fix of hang during Intel JIT profiling
Committed on behalf of Kirill Uhanov


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164736 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-26 23:43:56 +00:00
Bill Wendling
59e6586ee0 Buildbot Fix.
This method can be called with a '0' argument which checks the return
value. However, the method it calls doesn't expect '0' as a valid value. Call the
correct method when it's 0.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164735 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-26 23:38:00 +00:00
Nick Lewycky
bfc342d412 Disable the new SROA pass to get the tree back in working order. We don't yet
have testcases for the current problems.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164731 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-26 22:43:04 +00:00
Dan Gohman
8a63f99f03 Add IRBuilder code for adding !tbaa.struct metadata tags to llvm.memcpy calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164728 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-26 22:17:14 +00:00
Bill Wendling
896f37f0f9 Query the parameter attributes directly instead of using the Attribute symbols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164727 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-26 22:15:19 +00:00
Bill Wendling
2c18906118 Remove the `hasFnAttr' method from Function.
The hasFnAttr method has been replaced by querying the Attributes explicitly. No
intended functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164725 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-26 21:48:26 +00:00
Jim Grosbach
b7abea0840 X86_32: Large Symbol+Offset relocations.
If the offset is more than 24-bits, it won't fit in a scattered
relocation offset field, so we fall back to using a non-scattered
relocation.

rdar://12358909

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164724 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-26 21:27:45 +00:00
Bill Wendling
2c79ecbd70 Initial commit for the AttributesImpl class.
This opaque class will contain all of the attributes. All attribute queries will
go through this object. This object will also be uniqued in the LLVMContext.
Currently not used, so no implementation change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164722 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-26 21:07:29 +00:00
Akira Hatanaka
b500e9249a Add case clauses for returning dsp accumulator encoding values in function
getMipsRegisterNumbering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164720 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-26 19:27:24 +00:00
Akira Hatanaka
81571d3e0f Add DSP accumulator registers and register class. Remove hi/lo registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164719 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-26 19:25:21 +00:00
Akira Hatanaka
c878f3899c Delete member MipsFunctionInfo::OutArgFIRange and code that accesses it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164718 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-26 19:18:19 +00:00
Benjamin Kramer
4335e3495d Add support for detecting some corei7-class Xeons.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164714 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-26 18:21:47 +00:00
Duncan Sands
44401b7c80 Now that invoke of an intrinsic is possible (for the llvm.do.nothing intrinsic)
teach the callgraph logic to not create callgraph edges to intrinsics for invoke
instructions; it already skips this for call instructions.  Fixes PR13903.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164707 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-26 17:16:01 +00:00