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54ddf3d9c7
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2716 Commits

Author SHA1 Message Date
Daniel Dunbar
54ddf3d9c7 tblgen/AsmMatcher: Change AsmOperandClass to allow a list of superclasses instead of just one. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104452 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-22 21:02:29 +00:00
Daniel Dunbar
4072886a69 tblgen/Target: Add a isAsmParserOnly bit, and teach the disassembler to honor 
it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104270 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-20 20:20:32 +00:00
Daniel Dunbar
b0ac8677fd lit: Add another place to look for bash. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104189 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-19 23:56:09 +00:00
Sean Hunt
853197557c Replace FIRST_* and LAST_* macros with a generic STMT_RANGE macro 
Also rename ABSTRACT to ABSTRACT_STMT

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104018 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-18 06:22:50 +00:00
Evan Cheng
22c687b642 Added a QQQQ register file to model 4-consecutive Q registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103760 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-14 02:13:41 +00:00
Evan Cheng
dbf67fefea Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103746 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-13 23:55:47 +00:00
Chandler Carruth
93ca7b60bf Update tablegen to generate shorts instead of chars for subgroup arrays. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103704 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-13 07:43:47 +00:00
Daniel Dunbar
bd4fa2efd3 lit: Fix a sh lexing bug which caused annotate-token.m to fail when run with the 
internal shell parser; we weren't lexing the quotes in a command like::

  clang -DFOO='hello'

correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103652 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-12 21:47:58 +00:00
Daniel Dunbar
473a09d80a lit: Fix OneCommandPerFileTest format when tests are specified directly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103626 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-12 17:56:44 +00:00
Daniel Dunbar
b14c699fe0 lit: Add support for 'lit ... @foo', which reads a list of tests to run from 
foo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103625 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-12 17:56:42 +00:00
Dan Gohman
a6cb641f48 Add initial kill flag support to FastISel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103529 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-11 23:54:07 +00:00
Douglas Gregor
7d9663c70b Fixes for Microsoft Visual Studio 2010, from Steven Watanabe! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103457 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-11 06:17:44 +00:00
Sean Callanan
1a8b789a4b Eliminated the classification of control registers into %ecr_ 
and %rcr_, leaving just %cr_ which is what people expect.
Updated the disassembler to support this unified register set.
Added a testcase to verify that the registers continue to be
decoded correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103196 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-06 20:59:00 +00:00
Dan Gohman
34dcc6fadc Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it 
doesn't have to guess.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103194 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-06 20:33:48 +00:00
Evan Cheng
b63387afc6 Re-apply 103156 and 103157. 103156 didn't break anything. 10315 exposed a coalescer bug that's fixed by 103170. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103172 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-06 06:36:08 +00:00
Sean Hunt
44ed2c31a5 Fix some stylistic issues with my last commit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103164 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-06 05:24:38 +00:00
Bob Wilson
7d2552135d Select an ARM-hosted cross build with a separate makefile target instead of 
a magic project name.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103125 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-05 22:22:40 +00:00
Jeffrey Yasskin
15cdda259a Rearrange the suppressions files to be by-architecture instead of by-problem. 
ddunbar says the gcc-4.3.3 suppressions are obsolete.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103106 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-05 18:39:16 +00:00
Jeffrey Yasskin
91dd419ba4 Add a suppressions file for an intermittent "leak" under RegisterPass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103100 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-05 18:15:26 +00:00
Daniel Dunbar
e4eae84f76 lit: Allow test_format to be None. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103091 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-05 17:22:35 +00:00
Shantonu Sen
d1dd5ed0ed Add newline to end of file to avoid warning 
when building llvm with clang


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103084 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-05 13:56:46 +00:00
Sean Hunt
dc896a4118 Include the right header for toupper 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103073 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-05 04:31:44 +00:00
Sean Hunt
84e2f959b7 Add an emitter to handle the list of clang statement nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103071 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-05 04:13:08 +00:00
Chris Lattner
af1465b17b add the ability to associate 'category' names with clang diagnostics 
and diagnostic groups.  This allows the compiler to group 
diagnostics together (e.g. "Logic Warning", 
"Format String Warning", etc) like the static analyzer does.  
This is not exposed through anything in the compiler yet.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103050 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-04 20:44:23 +00:00
Daniel Dunbar
4f83e73a6d MC/Matcher: Add support for over-riding the default MatchInstruction function 
name (for example, to allow targets to interpose the actual MatchInstruction
function).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102987 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-04 00:33:13 +00:00
Dan Gohman
d622b0b208 Add a polygen rule that reflects the fact that nsw and nuw can be 
used together in either order.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102983 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-04 00:13:24 +00:00
Bob Wilson
857a894781 Remove special case for llvmCore_Embedded project. This is no longer needed 
since llvmCore is built as part of llvmgcc42 now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102962 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-03 21:41:24 +00:00
Evan Cheng
b55c8bed9d Add a pseudo instruction REG_SEQUENCE that takes a list of registers and 
sub-register indices and outputs a single super register which is formed from
a consecutive sequence of registers.

This is used as register allocation / coalescing aid and it is useful to
represent instructions that output register pairs / quads. For example,
v1024, v1025 = vload <address>
where v1024 and v1025 forms a register pair.

This really should be modelled as
v1024<3>, v1025<4> = vload <address>
but it would violate SSA property before register allocation is done.

Currently we use insert_subreg to form the super register:
v1026 = implicit_def
v1027 - insert_subreg v1026, v1024, 3
v1028 = insert_subreg v1027, v1025, 4
...
      = use v1024
      = use v1028

But this adds pseudo live interval overlap between v1024 and v1025.

We can now modeled it as
v1024, v1025 = vload <address>
v1026 = REG_SEQUENCE v1024, 3, v1025, 4
...
      = use v1024
      = use v1026

After coalescing, it will be
v1026<3>, v1025<4> = vload <address>
...
      = use v1026<3>
      = use v1026


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102815 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-01 00:28:44 +00:00
Bob Wilson
619d03fa04 Don't remove libLTO.dylib if it's not being installed in Developer/usr/lib; 
just leave it in Developer/usr/local/lib.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102646 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-29 18:04:29 +00:00
Bob Wilson
b8485d69c1 Add an option to the Apple-style build to control whether libLTO.dylib should 
be installed.  Disable it by default.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102531 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 21:08:01 +00:00
Bob Wilson
598f4abdf4 Undo most of my previous whitespace fix. I think I like it better this way 
after all.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102508 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 18:18:36 +00:00
Bob Wilson
d79f0edd62 Fix inconsistent use of HOSTS and TARGETS variables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102505 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 18:06:27 +00:00
Bob Wilson
2f6da3de25 Fix whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102504 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 17:50:03 +00:00
Sean Callanan
a0f914b6c1 Fixes to edis that mark x86 call targets as 
memory operands rather than immediate operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102217 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-23 22:17:17 +00:00
Johnny Chen
56a1afb6b0 When doing Thumb disassembly, there's no need to consider t2ADDrSPi12/t2SUBrSPi12, 
as their generic counterparts t2ADDri12/t2SUBri12 should suffice.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101929 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-20 18:45:24 +00:00
Chris Lattner
acfb70f750 stop computing InstImpInputs, it is dead 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101881 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-20 06:30:25 +00:00
Chris Lattner
62bcec82b2 DAGInstruction::ImpOperands is dead after my recent tblgen work, zap it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101880 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-20 06:28:43 +00:00
Anton Korobeynikov
928eb49cae Make processor FUs unique for given itinerary. This extends the limit of 32 
FU per CPU arch to 32 per intinerary allowing precise modelling of quite
complex pipelines in the future.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101754 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-18 20:31:01 +00:00
Chris Lattner
f06b859479 silence some -Wmissing-field-initializers warnings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101690 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-18 03:30:32 +00:00
Dan Gohman
b35798347e Fix a bunch of namespace polution. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101376 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-15 17:08:50 +00:00
Daniel Dunbar
8f10915145 Remove unnecessary uses of <iostream>. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101338 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-15 03:47:24 +00:00
Benjamin Kramer
be10811323 EDis: Don't include inttypes.h. We support compilers which don't provide it. It was unused anyways. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101241 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-14 13:56:38 +00:00
Daniel Dunbar
07b3a041b4 Fix -Asserts warnings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101191 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-13 23:34:11 +00:00
Sean Callanan
9899f70a74 Fixed a nasty layering violation in the edis source 
code.  It used to #include the enhanced disassembly
information for the targets it supported straight
out of lib/Target/{X86,ARM,...} but now it uses a
new interface provided by MCDisassembler, and (so
far) implemented by X86 and ARM.

Also removed hacky #define-controlled initialization
of targets in edis.  If clients only want edis to
initialize a limited set of targets, they can set
--enable-targets on the configure command line.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101179 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-13 21:21:57 +00:00
Johnny Chen
1808e4d251 If all the bit positions are not specified; do not decode the instructions. 
We are bound to fail!  For proper disassembly, the well-known encoding bits
of the instruction must be fully specified.

This also removes pseudo instructions from considerations of disassembly,
which is a better design and less fragile than the name matchings.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100899 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-09 21:01:02 +00:00
Chris Lattner
21aa347c28 add minix support, patch by Kees van Reeuwijk! PR6797 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100895 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-09 20:45:04 +00:00
Bob Wilson
ec80e2693a Provide versions of the ARM eh_sjlj_setjmp instructions for non-VFP subtargets 
such that the non-VFP versions have no implicit defs of VFP registers.
If any callee-saved VFP registers are marked as having been defined, the
prologue/epilogue code will try to save and restore them.
Radar 7770432.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100892 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-09 20:41:18 +00:00
Johnny Chen
e0c74fb1de ARM decoder emitter should print out useful information unconditionally when it 
encounters decoding conflicts, instead of wrapping it inside the DEBUG() macro. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100886 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-09 19:31:33 +00:00
Daniel Dunbar
2381379d1d lit: Add support to OneCommandPerFileTest format to take input directory from input path. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100846 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-09 02:15:10 +00:00
Johnny Chen
2d16a67b94 Now that Evan Cheng has fixed the coalescer bug (r100804), the workaround code 
to avoid memcpy() call is no longer necessary.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100811 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-08 21:23:54 +00:00