Commit Graph

74460 Commits

Author SHA1 Message Date
Michael Zolotukhin
4e7b10b07f Fix a trip-count overflow issue in LoopUnroll.
Currently LoopUnroll generates a prologue loop before the main loop
body to execute first N%UnrollFactor iterations. Also, this loop is
used if trip-count can overflow - it's determined by a runtime check.

However, we've been mistakenly optimizing this loop to a linear code for
UnrollFactor = 2, not taking into account that it also serves as a safe
version of the loop if its trip-count overflows.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222451 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 20:19:55 +00:00
Saleem Abdulrasool
e6c1fc9a44 X86: use the correct alloca symbol for Windows Itanium
Windows itanium targets the MSVCRT, and the stack probe symbol is provided by
MSVCRT.  This corrects the emission of stack probes on i686-windows-itanium.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222439 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 18:01:26 +00:00
Frederic Riss
12385e603f Make DWARFAcceleratorTable::dump() const.
As dump() methods  should be. To allow that, do not store the DWARFFormValue
objects used for the dump in the header data.

Per Alexey's suggestion!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222436 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 16:21:11 +00:00
Frederic Riss
d239f8c198 Add missing copyright headers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222435 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 16:21:06 +00:00
Frederic Riss
594bf484e4 Do not create a replaceable Variables MDNode for function forward decls.
These fields would need to be explicitly deleted before we RAUW the temporary
node anyway (this was done in cfe commit r222373). Instead, do not create
these useless nodes in the first place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222434 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 15:52:34 +00:00
Timur Iskhodzhanov
4b8337efd9 Revert r222416, r222422, r222426: the former revision had problems and fixing them introduced bugs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222428 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 12:36:43 +00:00
Timur Iskhodzhanov
6a490ac188 Fix a typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222426 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 11:48:58 +00:00
NAKAMURA Takumi
f9f464d44b SimplifyCFG.cpp: Tweak to let msc17 compliant.
- Use LLVM_DELETED_FUNCTION.
  - Don't use member initializers.
  - Don't use initializer list.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222422 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 08:59:02 +00:00
Mehdi Amini
b3e705ed1d SimplifyCFG: Refactor GatherConstantCompares() result in a struct
Code seems cleaner and easier to understand this way




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222416 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 06:51:02 +00:00
Jyoti Allur
dc0b300304 [ELF] Prevent ARM ELF object writer from generating deprecated relocation code R_ARM_PLT32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222414 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 05:58:11 +00:00
Craig Topper
136d5aeba4 Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222412 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 05:22:37 +00:00
Alexey Samsonov
88dc43f69e Remove support for undocumented SpecialCaseList entries.
"global-init", "global-init-src" and "global-init-type" were originally
used to blacklist entities in ASan init-order checker. However, they
were never documented, and later were replaced by "=init" category.

Old blacklist entries should be converted as follows:
  * global-init:foo -> global:foo=init
  * global-init-src:bar -> src:bar=init
  * global-init-type:baz -> type:baz=init



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222401 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-20 01:27:19 +00:00
Colin LeMahieu
e8cdd171f9 [Hexagon] Adding A2_xor instruction with IR selection pattern and test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222399 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 23:22:23 +00:00
Chad Rosier
503ec9826c Revert "[Reassociate] As the expression tree is rewritten make sure the operands are"
This reverts commit r222142.  This is causing/exposing an execution-time regression
in spec2006/gcc and coremark on AArch64/A57/Ofast.

Conflicts:

	test/Transforms/Reassociate/optional-flags.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222398 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 23:21:20 +00:00
Colin LeMahieu
fb1c650fd0 [Hexagon] Adding A2_or instruction with IR selection pattern and test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222396 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 22:58:04 +00:00
Nico Weber
660bac6a57 Try to fix MSVS build after r222384. No intended behavior change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222386 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 21:16:11 +00:00
Mehdi Amini
30bd0c753e SimplifyCFG: turn recursive GatherConstantCompares into iterative
A long sequence of || or && could lead to a stack explosion.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222384 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 20:09:11 +00:00
Matthias Braun
6e0f244d1f RegisterCoalescer: Improve debug messages
- Show "Considering..." message after flipping so you actually see the final
  destination vreg as destination.
- Add a message on final join, so you can grep for "Success" messages to obtain
  a list of which register got merged with which.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222382 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 19:46:17 +00:00
Matthias Braun
f5522a6b68 Add a print and verify pass after the RegisterCoalescer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222381 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 19:46:15 +00:00
Matthias Braun
4a7e0736d3 MachineVerifier: Report register for bad liveranges
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222380 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 19:46:13 +00:00
Matthias Braun
c754d5815d Introduce register dump helper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222379 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 19:46:11 +00:00
David Majnemer
a44c501561 AliasSet: Simplify mergeSetIn
No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222376 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 19:36:18 +00:00
Andrea Di Biagio
53daaff125 [X86] Improved lowering of v4x32 build_vector dag nodes.
This patch improves the lowering of v4f32 and v4i32 build_vector dag nodes
that are known to have at least two non-zero elements.

With this patch, a build_vector that performs a blend with zero is 
converted into a shuffle. This is done to let the shuffle legalizer expand
the dag node in a optimal way. For example, if we know that a build_vector
performs a blend with zero, we can try to lower it as a movq/blend instead of
always selecting an insertps.

This patch also improves the logic that lowers a build_vector into a insertps
with zero masking. See for example the extra test cases added to test sse41.ll.

Differential Revision: http://reviews.llvm.org/D6311


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222375 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 19:34:29 +00:00
Lang Hames
58c62e1dba [ADT] Fix PR20728 - Incorrect APFloat::fusedMultiplyAdd results for x86_fp80.
As detailed at http://llvm.org/PR20728, due to an internal overflow in
APFloat::multiplySignificand the APFloat::fusedMultiplyAdd method can return
incorrect results for x87DoubleExtended (x86_fp80) values. This commonly
manifests as incorrect constant folding of libm fmal calls on x86. E.g.

fmal(1.0L, 1.0L, 3.0L) == 0.0L      (should be 4.0L)

This patch fixes PR20728 by adding an extra bit to the significand for
intermediate results of APFloat::multiplySignificand, avoiding the overflow.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222374 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 19:15:41 +00:00
Tom Stellard
334ebf33ea R600/SI: Make SIInstrInfo::isOperandLegal() more strict
A register operand that has a common sub-class with its instruction's
defined register class is not always legal.  For example,
SReg_32 and M0Reg both have a common sub-class, but we can't
use an SReg_32 in instructions that expect a M0Reg.

This prevents the llvm.SI.sendmsg.ll test from failing when the fold
operand pass is added.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222368 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 16:58:49 +00:00
Zoran Jovanovic
d67cd80220 [mips][micromips] Implement SWM32 and LWM32 instructions
Differential Revision: http://reviews.llvm.org/D5519


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222367 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 16:44:02 +00:00
Suyog Sarda
ca72befdb5 Vectorize a reduction chain feeding into a 'return' statement.
e.x 
return (a[0]+b[0]) + (a[1]+b[1])

Differential Revision: http://reviews.llvm.org/D6227



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222364 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 16:07:38 +00:00
Jozef Kolek
9fece51399 [mips][microMIPS] Fix opcodes of MFHC1 and MTHC1 instructions.
Differential Revision: http://reviews.llvm.org/D6169


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222355 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 13:37:51 +00:00
Arnaud A. de Grandmaison
beeec3231e Fix tail recursion elimination
When the BasicBlock containing the return instrution has a PHI with 2
incoming values, FoldReturnIntoUncondBranch will remove the no longer
used incoming value and remove the no longer needed phi as well. This
leaves us with a BB that no longer has a PHI, but the subsequent call
to FoldReturnIntoUncondBranch from FoldReturnAndProcessPred will not
remove the return instruction (which still uses the result of the call
instruction). This prevents EliminateRecursiveTailCall to remove
the value, as it is still being used in a basicblock which has no
predecessors.

The basicblock can not be erased on the spot, because its iterator is
still being used in runTRE.

This issue was exposed when removing the threshold on size for lifetime
marker insertion for named temporaries in clang. The testcase is a much
reduced version of peelOffOuterExpr(const Expr*, const ExplodedNode *)
from clang/lib/StaticAnalyzer/Core/BugReporterVisitors.cpp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222354 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 13:32:51 +00:00
Jozef Kolek
e4e84b22fe [mips][microMIPS] Implement CodeGen support for 16-bit instruction ADDIUR2.
Differential Revision: http://reviews.llvm.org/D5800


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222352 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 13:23:58 +00:00
Jozef Kolek
5c6c7e3295 [mips][microMIPS] Implement CodeGen support for ADDIUS5 instruction.
Differential Revision: http://reviews.llvm.org/D5799


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222351 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 13:11:09 +00:00
Jozef Kolek
43ae00e4e0 [mips][microMIPS] Implement LWXS instruction.
Differential Revision: http://reviews.llvm.org/D5407


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222348 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 11:39:12 +00:00
Jozef Kolek
baf97d8987 [mips][microMIPS] Implement SDBBP and RDHWR instructions.
Differential Revision: http://reviews.llvm.org/D5240


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222347 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 11:25:50 +00:00
Simon Pilgrim
a6943fff90 [X86][SSE] pslldq/psrldq byte shifts/rotation for SSE2
This patch builds on http://reviews.llvm.org/D5598 to perform byte rotation shuffles (lowerVectorShuffleAsByteRotate) on pre-SSSE3 (palignr) targets - pre-SSSE3 is only enabled on i8 and i16 vector targets where it is a more definite performance gain.

I've also added a separate byte shift shuffle (lowerVectorShuffleAsByteShift) that makes use of the ability of the SLLDQ/SRLDQ instructions to implicitly shift in zero bytes to avoid the need to create a zero register if we had used palignr.

Differential Revision: http://reviews.llvm.org/D5699



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222340 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 10:06:49 +00:00
David Majnemer
f47d325eec AliasSetTracker: UnknownInsts should contribute to the refcount
AliasSetTracker::addUnknown may create an AliasSet devoid of pointers
just to contain an instruction if no suitable AliasSet already exists.
It will then AliasSet::addUnknownInst and we will be done.

However, it's possible for addUnknown to choose an existing AliasSet to
addUnknownInst.
If this were to occur, we are in a bit of a pickle: removing pointers
from the AliasSet can cause the entire AliasSet to become destroyed,
taking our unknown instructions out with them.

Instead, keep track whether or not our AliasSet has any unknown
instructions.

This fixes PR21582.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222338 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 09:41:05 +00:00
David Blaikie
5401ba7099 Update SetVector to rely on the underlying set's insert to return a pair<iterator, bool>
This is to be consistent with StringSet and ultimately with the standard
library's associative container insert function.

This lead to updating SmallSet::insert to return pair<iterator, bool>,
and then to update SmallPtrSet::insert to return pair<iterator, bool>,
and then to update all the existing users of those functions...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222334 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 07:49:26 +00:00
Hao Liu
0e8675a621 [AArch64] Disable useAA for Cortex-A57.
Using AA during CodeGen is very useful for in-order cores. It is less useful for ooo cores. Also I find
enabling useAA for Cortex-A57 may generate worse code for some test cases. If useAA in codegen is improved 
and benefical for ooo cores, we can enable it again.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222333 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 06:48:56 +00:00
Hao Liu
8db9fbf7cd [AArch64] Enable SeparateConstOffsetFromGEP, EarlyCSE and LICM passes on AArch64 backend.
SeparateConstOffsetFromGEP can gives more optimizaiton opportunities related to GEPs, which benefits EarlyCSE
and LICM. By enabling these passes we can have better address calculations and generate a better addressing
mode. Some SPEC 2006 benchmarks (astar, gobmk, namd) have obvious improvements on Cortex-A57.

Reviewed in http://reviews.llvm.org/D5864.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222331 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 06:39:53 +00:00
Hao Liu
eb52f383c2 [SeparateConstOffsetFromGEP] Allow SeparateConstOffsetFromGEP pass to lower GEPs.
If LowerGEP is enabled, it can lower a GEP with multiple indices into GEPs with a single index
or arithmetic operations. Lowering GEPs can always extract structure indices. Lowering GEPs can
also give use more optimization opportunities. It can benefit passes like CSE, LICM and CGP.

Reviewed in http://reviews.llvm.org/D5864


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222328 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 06:24:44 +00:00
David Blaikie
1d4f28c6bc Remove StringMap::GetOrCreateValue in favor of StringMap::insert
Having two ways to do this doesn't seem terribly helpful and
consistently using the insert version (which we already has) seems like
it'll make the code easier to understand to anyone working with standard
data structures. (I also updated many references to the Entry's
key and value to use first() and second instead of getKey{Data,Length,}
and get/setValue - for similar consistency)

Also removes the GetOrCreateValue functions so there's less surface area
to StringMap to fix/improve/change/accommodate move semantics, etc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222319 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 05:49:42 +00:00
Rui Ueyama
3977e2f696 llvm-readobj: fix off-by-one error in COFFDumper
It printed out base relocation table header as table entry.
This patch also makes llvm-readobj to not skip ABSOLUTE entries
becuase it was confusing.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222299 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 02:07:10 +00:00
Weiming Zhao
d8e31c73cd [Aarch64] Customer lowering of CTPOP to SIMD should check for NEON availability
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222292 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 00:29:14 +00:00
Kostya Serebryany
0dd5e22d89 [asan] add experimental basic-block tracing to asan-coverage; also fix -fsanitize-coverage=3 which was broken by r221718
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222290 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 00:22:58 +00:00
Rui Ueyama
6272b8c4be llvm-readobj: teach it how to dump COFF base relocation table
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222289 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 00:18:07 +00:00
Kostya Serebryany
f82e60f03d Introduce llvm::SplitAllCriticalEdges
Summary:
move the code from BreakCriticalEdges::runOnFunction()
into a separate utility function llvm::SplitAllCriticalEdges()
so that it can be used independently.
No functionality change intended.

Test Plan: check-llvm

Reviewers: nlewycky

Reviewed By: nlewycky

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6313

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222288 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 00:17:31 +00:00
Manman Ren
2b82868de5 Revert r222039 because of bot failure.
http://lab.llvm.org:8080/green/job/clang-Rlto_master/298/
Hopefully, bot will be green. If not, we will re-submit the commit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222287 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 00:13:26 +00:00
Matt Arsenault
1bd96c574c R600/SI: Implement areMemAccessesTriviallyDisjoint
This partially makes up for not having address spaces
used for alias analysis in some simple cases.

This is not yet enabled by default so shouldn't change anything yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222286 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 00:01:31 +00:00
Matt Arsenault
b556213712 R600/SI: Set hasSideEffects = 0 on load and store instructions.
Assuming unmodeled side effects interferes with some scheduling
opportunities.

Don't put it in the base class of DS instructions since there
are a few weird effecting, non load/store instructions there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222285 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 23:57:33 +00:00
Simon Pilgrim
e6d1a2625f [X86][AVX] 256-bit vector stack unaligned load/stores identification
Under many circumstances the stack is not 32-byte aligned, resulting in the use of the vmovups/vmovupd/vmovdqu instructions when inserting ymm reloads/spills.

This minor patch adds these instructions to the isFrameLoadOpcode/isFrameStoreOpcode helpers so that they can be correctly identified and not be treated as folded reloads/spills.

This has also been noticed by http://llvm.org/bugs/show_bug.cgi?id=18846 where it was causing redundant spills - I've added a reduced test case at test/CodeGen/X86/pr18846.ll

Differential Revision: http://reviews.llvm.org/D6252



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222281 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 23:38:19 +00:00
Colin LeMahieu
642bb08576 [Hexagon] Adding A2_and instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222274 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 22:45:47 +00:00
Chad Rosier
32dc2de667 [FastISel][AArch64] Also allow folding of sign-/zero-extend and arithmetic
shift-right for booleans (i1).

Arithmetic shift-right immediate with sign-/zero-extensions also works for
boolean values.  Update the assert and the test cases to reflect that fact.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222272 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 22:41:49 +00:00
Chad Rosier
5e3288f85b [FastISel][AArch64] Also allow folding of sign-/zero-extend and logical
shift-right for booleans (i1).

Logical shift-right immediate with sign-/zero-extensions also works for boolean
values.  Update the assert and the test cases to reflect that fact.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222270 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 22:38:42 +00:00
David Majnemer
643bef9333 InstCombine: Fix another infinite loop caused by visitFPTrunc
We would attempt to replace an frem's operand with the same operand.
This would cause InstCombine to think real work was done, causing
InstCombine to enter an infinite loop.

This fixes the second part of PR21576.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222265 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 22:06:45 +00:00
Colin LeMahieu
ed37b1e2d0 [Hexagon] Adding A2_sub instruction
Renaming test files.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222263 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 21:51:51 +00:00
David Majnemer
063e54286c Revert "Revert r222040 because of bot failure."
This reverts commit r222203, reverting r222040 didn't end up turning the
bot green.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222261 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 21:30:02 +00:00
Juergen Ributzka
52e0f75f82 [FastISel][AArch64] Follow-up fix for "Fix shift-immediate emission for "zero" shifts."
Shifts also perform sign-/zero-extends to larger types, which requires us to emit
an integer extend instead of a simple COPY.

Related to PR21594.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222257 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 21:20:17 +00:00
Matt Arsenault
a140448780 R600/SI: Move SIFixSGPRCopies to inst selector passes
This should expose more of the actually used VALU
instructions to the machine optimization passes.

This also should help getting i1 handling into a better state.
For not entirly understood reasons, this fixes the split-scalar-i64-add.ll
test where a 64-bit add would only partially be moved to the VALU
resulting in use of undefined VCC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222256 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 21:06:58 +00:00
Juergen Ributzka
50fa2ff5d2 [AArch64] Don't optimize all compare instructions.
"optimizeCompareInstr" converts compares (cmp/cmn) into plain sub/add
instructions when the flags are not used anymore. This conversion is valid for
most instructions, but not all. Some instructions that don't set the flags
(e.g. sub with immediate) can set the SP, whereas the flag setting version uses
the same encoding for the "zero" register.

Update the code to also check for the return register before performing the
optimization to make sure that a cmp doesn't suddenly turn into a sub that sets
the stack pointer.

I don't have a test case for this, because it isn't easy to trigger.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222255 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 21:02:40 +00:00
Owen Anderson
b39e517168 Fix an incorrect chain operand when expanding INSERT_VECTOR operations through the stack.
Patch by Daniil Troshkov!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222254 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 20:50:19 +00:00
Tom Stellard
891e9e7869 R600/SI: Make sure resource descriptors are always stored in SGPRs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222253 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 20:39:39 +00:00
Colin LeMahieu
b7927f100d [Hexagon] Converting from ADD_rr to A2_add which has encoding bits.
Adding test to show correct instruction selection and encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222249 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 20:28:11 +00:00
Chad Rosier
3980c542e6 [Reassociate] Rename local variable to not use same name as a member
variable. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222248 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 20:21:54 +00:00
Juergen Ributzka
8b62d78689 [FastISel][AArch64] Fix shift-immediate emission for "zero" shifts.
This change emits a COPY for a shift-immediate with a "zero" shift value.
This fixes PR21594 where we emitted a shift instruction with an incorrect
immediate operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222247 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 19:58:59 +00:00
Jozef Kolek
c8ec320371 Test commit to verify that commit access works.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222244 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 19:20:34 +00:00
Philip Reames
0814bd85dd Tweak EarlyCSE to recognize series of dead stores
EarlyCSE is giving up on the current instruction immediately when it recognizes that the current instruction makes a previous store trivially dead. There's no reason to do this. Once the previous store has been deleted, it's perfectly legal to remember the value of the current store (for value forwarding) and the fact the store occurred (it could be dead too!).

Reviewed by: Hal
Differential Revision: http://reviews.llvm.org/D6301



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222241 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 17:46:32 +00:00
David Majnemer
0ede3a2ae5 InstCombine: Fold away tautological masked compares
It is impossible for (x & INT_MAX) == 0 && x == INT_MAX to ever be true.

While this sort of reasoning should normally live in InstSimplify,
the machinery that derives this result is not trivial to split out.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222230 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 09:31:41 +00:00
David Majnemer
2c906a4607 InstCombine: Clean up foldLogOpOfMaskedICmps
No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222229 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 09:31:36 +00:00
Frederic Riss
60a8349a7d Allow DwarfCompileUnit::constructImportedEntityDIE to instanciate a GlobalVariable DIE.
Usually global variables are in a retain list and instanciated before
any call to constructImportedEntityDIE is made. This isn't true for
forward declarations though.
The testcase for this change is generated by a clang patched to emit
such forward declarations (patch at http://reviews.llvm.org/D6173
which will land soon). The updated testcase tests more than just
global variables, it now tests every type of 'using' clause we
support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222217 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 02:46:11 +00:00
Hans Wennborg
9ba744b089 SimplifyCFG: Range'ify some for-loops. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222215 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 02:37:11 +00:00
David Majnemer
1ade0f0faa IndVarSimplify: Allow LFTR to fire more often
I added a pessimization in r217102 to prevent miscompiles when the
incremented induction variable was used in a comparison; it would be
poison.

Try to use the incremented induction variable more often when we can be
sure that the increment won't end in poison.

Differential Revision: http://reviews.llvm.org/D6222

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222213 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 02:20:58 +00:00
Duncan P. N. Exon Smith
5d8a792eac IR: Sink MDNode::Hash down to GenericMDNode::Hash
Part of PR21532.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222212 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 02:20:29 +00:00
Duncan P. N. Exon Smith
023c72e64a IR: Move MDNode operands from the back to the front
Having the operands at the back prevents subclasses from safely adding
fields.  Move them to the front.

Instead of replicating the custom `malloc()`, `free()` and `DestroyFlag`
logic that was there before, overload `new` and `delete`.

I added calls to a new `GenericMDNode::dropAllReferences()` in
`LLVMContextImpl::~LLVMContextImpl()`.  There's a maze of callbacks
happening during teardown, and this resolves them before we enter
the destructors.

Part of PR21532.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222211 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 01:56:14 +00:00
Michael J. Spencer
182856d70c Fix covered switch warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222209 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 01:26:46 +00:00
Michael J. Spencer
b9f39bcc82 Support ELF files of unknown type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222208 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 01:14:25 +00:00
Duncan P. N. Exon Smith
2c38b004d9 IR: Split MDNode into GenericMDNode and MDNodeFwdDecl
Split `MDNode` into two classes:

  - `GenericMDNode`, which is uniquable (and for now, always starts
    uniqued).  Once `Metadata` is split from the `Value` hierarchy, this
    class will lose the ability to RAUW itself.

  - `MDNodeFwdDecl`, which is used for the "temporary" interface, is
    never uniqued, and isn't managed by `LLVMContext` at all.

I've left most of the guts in `MDNode` for now, but I'll incrementally
move things to the right places (or delete the functionality, as
appropriate).

Part of PR21532.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222205 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 00:37:17 +00:00
Manman Ren
8ce35351f8 Revert r222040 because of bot failure.
http://lab.llvm.org:8080/green/job/clang-Rlto_master/298/
Hopefully, bot will be green.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222203 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 00:33:22 +00:00
Manman Ren
b05098b884 Debug Info: In DIBuilder, the context field of a global variable is updated to
use DIScopeRef.

A paired commit at clang will follow to show cases where we will use an
identifer for the context of a global variable.

rdar://18958417


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222195 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 00:29:08 +00:00
Duncan P. N. Exon Smith
66a2b0564e IR: Simplify uniquing for MDNode
Change uniquing from a `FoldingSet` to a `DenseSet` with custom
`DenseMapInfo`.  Unfortunately, this doesn't save any memory, since
`DenseSet<T>` is a simple wrapper for `DenseMap<T, char>`, but I'll come
back to fix that later.

I used the name `GenericDenseMapInfo` to the custom `DenseMapInfo` since
I'll be splitting `MDNode` into two classes soon: `MDNodeFwdDecl` for
temporaries, and `GenericMDNode` for everything else.

I also added a non-debug-info reduced version of a type-uniquing test
that started failing on an earlier draft of this patch.

Part of PR21532.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222191 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-17 23:28:21 +00:00
Reid Kleckner
8083adcaca Revert "ADT: correctly report isMSVCEnvironment for windows itanium"
This reverts commit r222180.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222188 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-17 22:55:59 +00:00
Saleem Abdulrasool
2bd09db07f ADT: correctly report isMSVCEnvironment for windows itanium
The itanium environment on Windows uses MSVC and is a MSVC environment.  Report
this correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222180 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-17 22:13:26 +00:00
Matt Arsenault
84230f9a53 R600/SI: Don't copy flags when extracting subreg
This was resulting in use of a register after a kill.
For some reason this showed up as a problem in many tests
when moving the SIFixSGPRCopies pass closer to instruction
selection.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222175 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-17 21:11:37 +00:00
Matt Arsenault
6a95eb021b R600/SI: Assume SIFixSGPRCopies makes changes
I'm not sure if this was breaking anything.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222174 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-17 21:11:34 +00:00
Rafael Espindola
c4fe4e9681 Factor common code it Linker::init.
The TypeFinder was not being used in one of the constructors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222172 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-17 20:51:01 +00:00
Rafael Espindola
dfeee31cac Pass a reference to ValueEnumerator.
NFC. This will just make it easier to use std::unique_ptr in a caller.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222170 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-17 20:06:27 +00:00
Juergen Ributzka
18db81a0ec [SimplifyCFG] Make the value type of the hole check bitmask a power-of-2.
When converting a switch to a lookup table we might have to generate a bitmaks
to encode and check for holes in the original switch statement.

The type of this mask depends on the number of switch statements, which can
result in illegal types for pretty much all architectures.

To avoid unnecessary type legalization and help FastISel this commit increases
the size of the bitmask to next power-of-2 value when necessary.

This fixes rdar://problem/18984639.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222168 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-17 19:39:56 +00:00
Chad Rosier
14915fe523 [Reassociate] As the expression tree is rewritten make sure the operands are
emitted in canonical form.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222142 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-17 16:33:50 +00:00
Alexey Volkov
19e8fe05dc [X86] Use ADD/SUB instead of INC/DEC for Haswell and Broadwell CPUs
Differential Revision: http://reviews.llvm.org/D5934



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222141 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-17 16:17:51 +00:00
Chad Rosier
ae3738f4a7 [Reassociate] Canonicalize constants to RHS operand.
Fix a thinko where the RHS was already a constant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222139 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-17 15:52:51 +00:00
Renato Golin
18e5ce0188 Fix ARM triple parsing
The triple parser should only accept existing architecture names
when the triple starts with armv, armebv, thumbv or thumbebv.

Patch by Gabor Ballabas.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222129 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-17 14:08:57 +00:00
David Majnemer
2014c91510 ScalarEvolution: Construct SCEVDivision's Derived type instead of itself
SCEVDivision::divide constructed an object of SCEVDivision<Derived>
instead of Derived.  divide would call visit which would cast the
SCEVDivision<Derived> to type Derived.  As it happens,
SCEVDivision<Derived> and Derived currently have the same layout but
this is fragile and grounds for UB.

Instead, just construct Derived.  No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222126 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-17 11:27:45 +00:00
Oliver Stannard
8f832fce3b [Thumb1] Re-write emitThumbRegPlusImmediate
This was motivated by a bug which caused code like this to be
miscompiled:
  declare void @take_ptr(i8*)
  define void @test() {
    %addr1.32 = alloca i8
    %addr2.32 = alloca i32, i32 1028
    call void @take_ptr(i8* %addr1)
    ret void
  }

This was emitting the following assembly to get the value of %addr1:
  add r0, sp, #1020
  add r0, r0, #8
However, "add r0, r0, #8" is not a valid Thumb1 instruction, and this
could not be assembled. The generated object file contained this,
resulting in r0 holding SP+8 rather tha SP+1028:
  add r0, sp, #1020
  add r0, sp, #8

This function looked like it could have caused miscompilations for
other combinations of registers and offsets (though I don't think it is
currently called with these), and the heuristic it used did not match
the emitted code in all cases.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222125 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-17 11:18:10 +00:00
David Majnemer
a18e46cbc9 Object, COFF: Tighten the object file parser
We were a little lax in a few areas:
- We pretended that import libraries were like any old COFF file, they
  are not.  In fact, they aren't really COFF files at all, we should
  probably grow some specialized functionality to handle them smarter.
- Our symbol iterators were more than happy to attempt to go past the
  end of the symbol table if you had a symbol with a bad list of
  auxiliary symbols.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222124 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-17 11:17:17 +00:00
Oliver Stannard
d9d2703b71 Fix optimisations of SELECT_CC which assumed result is boolean
Some optimisations in DAGCombiner cause miscompilations for targets that use
TargetLowering::UndefinedBooleanContent, because they assume that the results
of a SELECT_CC node are boolean values, and can be safely ANDed, ORed and
XORed. These optimisations are only valid for targets that use
ZeroOrOneBooleanContent or ZeroOrNegativeOneBooleanContent.

This is a follow-up to D6210/r221693.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222123 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-17 10:49:31 +00:00
Yaron Keren
c2eafa1ce3 silence gcc 4.9.1 warning in /llvm/lib/Support/Windows/Path.inc:564:39:
warning: suggest parentheses around assignment used as truth value [-Wparentheses]
   if (ec = widenPath(path, path_utf16))



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222122 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-17 09:29:33 +00:00
Erik Eckstein
72a1394991 Optimize switch lookup tables with linear mapping.
This is a simple optimization for switch table lookup:
It computes the output value directly with an (optional) mul and add if there is a linear mapping between index and output.
Example:

int f1(int x) {
  switch (x) {
    case 0: return 10;
    case 1: return 11;
    case 2: return 12;
    case 3: return 13;
  }
  return 0;
}

generates:

define i32 @f1(i32 %x) #0 {
entry:
  %0 = icmp ult i32 %x, 4
  br i1 %0, label %switch.lookup, label %return

switch.lookup:
  %switch.offset = add i32 %x, 10
  ret i32 %switch.offset

return:
  ret i32 0
}



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222121 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-17 09:13:57 +00:00
Craig Topper
dbd73669e5 Add missing semicolon from r222118.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222119 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-17 05:58:26 +00:00
Craig Topper
a5babc8a31 Move register class name strings to a single array in MCRegisterInfo to reduce static table size and number of relocation entries.
Indices into the table are stored in each MCRegisterClass instead of a pointer. A new method, getRegClassName, is added to MCRegisterInfo and TargetRegisterInfo to lookup the string in the table.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222118 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-17 05:50:14 +00:00
Rafael Espindola
daa09d03ab Add back r222061 with a fix.
This adds back r222061, but now calls initializePAEvalPass from the correct
library to avoid link problems.

Original message:

Don't make assumptions about the name of private global variables.

Private variables are can be renamed, so it is not reliable to make
decisions on the name.

The name is also dropped by the assembler before getting to the
linker, so using the name causes a disconnect between how llvm makes a
decision (var name) and how the linker makes a decision (section it is
in).

This patch changes one case where we were looking at the variable name to use
the section instead.

Test tuning by Michael Gottesman.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222117 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-17 02:28:27 +00:00
Craig Topper
cac2f22b32 Replace a couple asserts with static_asserts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222114 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-17 00:26:50 +00:00
Craig Topper
56391ddf5d Convert some EVTs to MVTs where only a SimpleValueType is needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222109 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-16 21:17:18 +00:00