Commit Graph

3289 Commits

Author SHA1 Message Date
David Greene
6032269837 [AVX] Add type checking support for vector/subvector type constraints.
This will be used to check patterns referencing a forthcoming
INSERT_SUBVECTOR SDNode.  INSERT_SUBVECTOR in turn is very useful for
matching to VINSERTF128 instructions and complements the already
existing EXTRACT_SUBVECTOR SDNode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124145 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-24 20:53:18 +00:00
Bill Wendling
0ef755d905 ARM uses '.' in their tokens. Give it a name instead of a numeric value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124026 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-22 09:44:32 +00:00
Peter Collingbourne
be111ef182 tblgen: Add support for non-inheritable attributes
This patch makes the necessary changes to TableGen to support
non-inheritable attributes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123958 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-21 02:08:26 +00:00
Bob Wilson
55931ab992 Move InstAlias check of argument types to a separate loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123934 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20 18:38:10 +00:00
Bob Wilson
906bc368bc Tidy comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123933 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20 18:38:07 +00:00
Bob Wilson
47c90a70ba Fix broken check for InstAlias argument used with different types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123932 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20 18:38:05 +00:00
Bob Wilson
5e8f2a65ca Precompute InstAlias operand mapping to result instruction operand indices.
There should be no functional change from this, but I think it's simpler this
way.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123931 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20 18:38:02 +00:00
Douglas Gregor
348c975cb8 Fix comment for gen-clang-decl-nodes tblgen backend, from Michael Han
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123833 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-19 15:57:47 +00:00
Owen Anderson
6cd0b17ba7 When matching asm operands, always try to match the most restricted type first.
Unfortunately, while this is the "right" thing to do, it breaks some ARM
asm parsing tests because MemMode5 and ThumbMemModeReg are ambiguous.  This
is tricky to resolve since neither is a subset of the other.

XFAIL the test for now.  The old way was broken in other ways, just ways
we didn't happen to be testing, and our ARM asm parsing is going to require
significant revisiting at a later point anyways.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123786 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 23:01:21 +00:00
Bruno Cardoso Lopes
a461d42228 Add support for parsing and encoding ARM's official syntax for the BFI instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123770 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 20:45:56 +00:00
Daniel Dunbar
55b5e85643 Formatting tweak.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123718 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 01:59:30 +00:00
Bob Wilson
dc1a2bd3aa Fix some tablegen issues to allow using zero_reg for InstAlias definitions.
This is needed to allow an InstAlias for an instruction with an "OptionalDef"
result register (like ARM's cc_out) where you want to set the optional register
to reg0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123490 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 22:58:09 +00:00
Owen Anderson
e4e5e2aae7 Add support to the ARM MC infrastructure to support mcr and friends. This requires supporting
the symbolic immediate names used for these instructions, fixing their pretty-printers, and
adding proper encoding information for them.

With this, we can properly pretty-print and encode assembly like:
	mrc p15, #0, r3, c13, c0, #3

Fixes <rdar://problem/8857858>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123404 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 21:46:02 +00:00
Evan Cheng
7597212abc Model :upper16: and :lower16: as ARM specific MCTargetExpr. This is a step
in the right direction. It eliminated some hacks and will unblock codegen
work. But it's far from being done. It doesn't reject illegal expressions,
e.g. (FOO - :lower16:BAR). It also doesn't work in Thumb2 mode at all.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123369 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 07:58:56 +00:00
Daniel Dunbar
e6e5fbb671 McARM: Write a silly Python script to compute some hard coded info from the
generated ARM match table, which is substantially more efficient than dealing
with tblgen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123252 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11 19:06:26 +00:00
Daniel Dunbar
083203dde8 MC/AsmMatcher: Fix indirect 80-col viola.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123174 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 15:26:11 +00:00
Francois Pichet
7a0be17c08 On Windows, replace each occurrence of '\' by '\\' on the replacement string. This is necessary to prevent re.sub from replacing escape sequences occurring in path.
For example:

llvm\tools\clang\test
was replaced by
llvm <tab> ools\clang <tab> est


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123070 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-08 18:09:48 +00:00
Eric Christopher
da7a32c07d I don't think I could find a 10.2.x box if I tried.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123051 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-08 01:52:20 +00:00
Bob Wilson
067a16c974 Use __builtin_shufflevector to implement vget_low and vget_high intrinsics.
This was suggested by Edmund Grimley Evans in pr8411.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123043 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07 23:40:49 +00:00
David Greene
1434f66b2e Rename lisp-like functions as suggested by Gabor Greif as loooong time
ago.  This is both easier to learn and easier to read.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123001 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07 17:05:37 +00:00
Francois Pichet
ba69d3f6d4 Disable r122754 on Windows: was causing all lit tests to fail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122808 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-04 10:23:42 +00:00
David Greene
18d4987753 Reapply 122341 to fix PR8199 now that clang changes are in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122754 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-03 17:30:25 +00:00
Jim Grosbach
398abb4a9a Trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122542 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-24 05:06:32 +00:00
Chris Lattner
036609bd7d Flag -> Glue, the ongoing saga
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122513 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 18:28:41 +00:00
Chris Lattner
29d8f0cae4 flags -> glue for selectiondag
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122509 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 17:24:32 +00:00
Chris Lattner
a4359be032 sdisel flag -> glue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122507 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 17:13:18 +00:00
Chris Lattner
8950bcaa5a continue renaming flag -> glue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122506 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 17:03:20 +00:00
Jeffrey Yasskin
8e68c38735 Change all self assignments X=X to (void)X, so that we can turn on a
new gcc warning that complains on self-assignments and
self-initializations.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122458 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 00:58:24 +00:00
Bill Wendling
65e43a259f Default to armv7 instead of armv6.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122457 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 00:49:18 +00:00
David Greene
234da6832f Revert 122341. It breaks some darwin tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122346 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-21 17:25:43 +00:00
David Greene
4d75d80d62 Fix PR 8199. This patch prepends the build tool dir to LLVM programs
being tested.  This ensures that we test the tools just built and not
some random tools that might happen to be in the user's PATH.  This
makes LLVM testing much more stable and predictable.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122341 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-21 16:55:53 +00:00
Jim Grosbach
fbadcd0826 Tidy up a bit. Trailing whitespace, hard tabs and 80-columns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122337 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-21 16:16:00 +00:00
Chris Lattner
f1b4eafbfe rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for
something that just glues two nodes together, even if it is
sometimes used for flags.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122310 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-21 02:38:05 +00:00
Michael J. Spencer
7385509101 Support/PathV1: Deprecate get{Basename,Dirname,Suffix}.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122157 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18 22:23:07 +00:00
Owen Anderson
fffa863536 Revert r122143 through r122140, which collectively broke the LLVMC tests on
the buildbots.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122149 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18 07:37:18 +00:00
Michael J. Spencer
b9c767cce5 Support/PathV1: Deprecate get{Basename,Dirname,Suffix}.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122141 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18 04:13:36 +00:00
Bob Wilson
14595d967f Neon intrinsic tests need to be compiled for Cortex-A9 for f16 support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122015 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 01:21:03 +00:00
Michael J. Spencer
3ff9563c3e MemoryBuffer now return an error_code and returns a OwningPtr<MemoryBuffer> via an out parm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121958 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 03:29:14 +00:00
Bob Wilson
ae6be764f9 Teach the Neon intrinsic generator to widen half-precision float types.
This isn't currently used for anything but I ran into it when experimenting
with some changes, and it might be useful in the future.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121911 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 23:16:25 +00:00
Bob Wilson
333f5194cb Add a Neon intrinsic test generator.
This is still a WIP.  It's already good enough to expose a few bugs, though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121868 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 16:58:45 +00:00
Bob Wilson
06b04aaf5c Fix Neon intrinsic immediate range checking for some double-register operands.
Some quad-register intrinsics with lane operands only take a double-register
operand for the vector containing the lane.  The valid range of lane numbers
is then half as big as you would expect from the quad-register type.
Note: This currently has no effect because those intrinsics are now handled
entirely in the header file using __builtin_shufflevector, which does its own
range checking, but I want to use this for generating tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121867 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 16:58:42 +00:00
Chris Lattner
9c6b60eb28 various cleanups to tblgen, patch by Garrison Venn!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121837 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 04:48:22 +00:00
Mikhail Glushenkov
87685e8e8f llvmc: make switch options ZeroOrMore by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121822 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 01:21:59 +00:00
Jakob Stoklund Olesen
b83ff84193 Introduce TargetRegisterInfo::getOverlaps(Reg), returning a list of all
registers that alias Reg, including itself. This is almost the same as the
existing getAliasSet() method, except for the inclusion of Reg.

The name matches the reflexive TRI::regsOverlap(x, y) relation.

It is very common to do stuff to a register and all its aliases:

  stuff(Reg)
  for (const unsigned *Alias = TRI->getAliasSet(Reg); *Alias; ++Alias)
    stuff(*Alias);

That can now be written as the simpler:

  for (const unsigned *Alias = TRI->getOverlaps(Reg); *Alias; ++Alias)
    stuff(*Alias);

This change requires a bit more constant space for the alias lists because Reg
is included and because the empty alias list cannot be shared any longer.

If the getAliasSet method is eventually removed, this space can be reclaimed by
sharing overlap lists. For instance, %rax and %eax have identical overlap sets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121800 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 23:03:42 +00:00
Jim Grosbach
d40963c406 Add support for MC-ized encoding of tLEApcrel and tLEApcrelJT. rdar://8755755
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121798 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 22:28:03 +00:00
Bill Wendling
f4caf69720 The tLDR et al instructions were emitting either a reg/reg or reg/imm
instruction based on the t_addrmode_s# mode and what it returned. There is some
obvious badness to this. In particular, it's hard to do MC-encoding when the
instruction may change out from underneath you after the t_addrmode_s# variable
is finally resolved.

The solution is to revert a long-ago change that merged the reg/reg and reg/imm
versions. There is the addition of several new addressing modes. They no longer
have extraneous operands associated with them. I.e., if it's reg/reg we don't
have to have a dummy zero immediate tacked on to the SDNode.

There are some obvious cleanups here, which will happen shortly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121747 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 03:36:38 +00:00
Owen Anderson
a838a25d59 Second attempt at make Thumb2 LEAs pseudos. This time, perform the lowering much later, which makes the entire
process cleaner.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121735 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 00:36:49 +00:00
Bob Wilson
4711d5cda3 Remove the rest of the *_sfp Neon instruction patterns.
Use the same COPY_TO_REGCLASS approach as for the 2-register *_sfp instructions.
This change made a big difference in the code generated for the
CodeGen/Thumb2/cross-rc-coalescing-2.ll test: The coalescer is still doing
a fine job, but some instructions that were previously moved outside the loop
are not moved now.  It's using fewer VFP registers now, which is generally
a good thing, so I think the estimates for register pressure changed and that
affected the LICM behavior.  Since that isn't obviously wrong, I've just
changed the test file.  This completes the work for Radar 8711675.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121730 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-13 23:02:37 +00:00
Owen Anderson
6b8719fd7d Revert r121721, which broke buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121726 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-13 22:51:08 +00:00
Owen Anderson
e8d02539d7 Make Thumb2 LEA-like instruction into pseudos, which map down to ADR. Provide correct fixups for Thumb2 ADR,
which is _of course_ different from ARM ADR fixups, or any other Thumb2 fixup.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121721 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-13 22:29:52 +00:00