Commit Graph

77144 Commits

Author SHA1 Message Date
Igor Laevsky
589d13e8f5 Add invoke related functionality into StatepointSite classes.
Differential Revision: http://reviews.llvm.org/D7364



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229838 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 11:02:11 +00:00
Elena Demikhovsky
675d06d1d0 AVX-512: Full implementation for VRNDSCALESS/SD instructions and intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229837 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 10:48:04 +00:00
Chandler Carruth
ac2b1a1bb3 [x86] Add support for bit-wise blending and use it in the v8 and v16
lowering paths. I'm going to be leveraging this to simplify a lot of the
overly complex lowering of v8 and v16 shuffles in pre-SSSE3 modes.

Sadly, this isn't profitable on v4i32 and v2i64. There, the float and
double blending instructions for pre-SSE4.1 are actually pretty good,
and we can't beat them with bit math. And once SSE4.1 comes around we
have direct blending support and this ceases to be relevant.

Also, some of the test cases look odd because the domain fixer
canonicalizes these to floating point domain. That's OK, it'll use the
integer domain when it matters and some day I may be able to update
enough of LLVM to canonicalize the other way.

This restores almost all of the regressions from teaching x86's vselect
lowering to always use vector shuffle lowering for blends. The remaining
problems are because the v16 lowering path is still doing crazy things.
I'll be re-arranging that strategy in more detail in subsequent commits
to finish recovering the performance here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229836 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 10:46:52 +00:00
Chandler Carruth
a8fb39af83 [x86,sdag] Two interrelated changes to the x86 and sdag code.
First, don't combine bit masking into vector shuffles (even ones the
target can handle) once operation legalization has taken place. Custom
legalization of vector shuffles may exist for these patterns (making the
predicate return true) but that custom legalization may in some cases
produce the exact bit math this matches. We only really want to handle
this prior to operation legalization.

However, the x86 backend, in a fit of awesome, relied on this. What it
would do is mark VSELECTs as expand, which would turn them into
arithmetic, which this would then match back into vector shuffles, which
we would then lower properly. Amazing.

Instead, the second change is to teach the x86 backend to directly form
vector shuffles from VSELECT nodes with constant conditions, and to mark
all of the vector types we support lowering blends as shuffles as custom
VSELECT lowering. We still mark the forms which actually support
variable blends as *legal* so that the custom lowering is bypassed, and
the legal lowering can even be used by the vector shuffle legalization
(yes, i know, this is confusing. but that's how the patterns are
written).

This makes the VSELECT lowering much more sensible, and in fact should
fix a bunch of bugs with it. However, as you'll see in the test cases,
right now what it does is point out the *hilarious* deficiency of the
new vector shuffle lowering when it comes to blends. Fortunately, my
very next patch fixes that. I can't submit it yet, because that patch,
somewhat obviously, forms the exact and/or pattern that the DAG combine
is matching here! Without this patch, teaching the vector shuffle
lowering to produce the right code infloops in the DAG combiner. With
this patch alone, we produce terrible code but at least lower through
the right paths. With both patches, all the regressions here should be
fixed, and a bunch of the improvements (like using 2 shufps with no
memory loads instead of 2 andps with memory loads and an orps) will
stay. Win!

There is one other change worth noting here. We had hilariously wrong
vectorization cost estimates for vselect because we fell through to the
code path that assumed all "expand" vector operations are scalarized.
However, the "expand" lowering of VSELECT is vector bit math, most
definitely not scalarized. So now we go back to the correct if horribly
naive cost of "1" for "not scalarized". If anyone wants to add actual
modeling of shuffle costs, that would be cool, but this seems an
improvement on its own. Note the removal of 16 and 32 "costs" for doing
a blend. Even in SSE2 we can blend in fewer than 16 instructions. ;] Of
course, we don't right now because of OMG bad code, but I'm going to fix
that. Next patch. I promise.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229835 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 10:36:19 +00:00
Michael Kuperstein
23dd089d8f Use std::bitset for SubtargetFeatures
Previously, subtarget features were a bitfield with the underlying type being uint64_t. 
Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset.

No functional change.

Differential Revision: http://reviews.llvm.org/D7065

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229831 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 09:01:04 +00:00
Davide Italiano
d6f86b8614 [Support/Timer] Make GetMallocUsage() aware of jemalloc.
Differential Revision:	D7657
Reviewed by:	shankarke, majnemer


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229824 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 07:27:14 +00:00
Dmitri Gribenko
07aa3556c4 Provide the same ABI regardless of NDEBUG
For projects depending on LLVM, I find it very useful to combine a
release-no-asserts build of LLVM with a debug+asserts build of the dependent
project.  The motivation is that when developing a dependent project, you are
debugging that project itself, not LLVM.  In my usecase, a significant part of
the runtime is spent in LLVM optimization passes, so I would like to build LLVM
without assertions to get the best performance from this combination.

Currently, `lib/Support/Debug.cpp` changes the set of symbols it provides
depending on NDEBUG, while `include/llvm/Support/Debug.h` requires extra
symbols when NDEBUG is not defined.  Thus, it is not possible to enable
assertions in an external project that uses facilities of `Debug.h`.

This patch changes `Debug.cpp` and `Valgrind.cpp` to always define the symbols
that other code may depend on when #including LLVM headers without NDEBUG.

http://reviews.llvm.org/D7662



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229819 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 05:30:16 +00:00
Eric Christopher
4a48ec9281 Remove the local subtarget variable from the SystemZ asm printer
and update the two calls accordingly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229805 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 01:26:28 +00:00
Eric Christopher
9a6b4219e2 Remove a few more calls to TargetMachine::getSubtarget from the
R600 port.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229804 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 01:10:55 +00:00
Eric Christopher
fde0733828 Grab the subtarget off of the machine function for the R600
asm printer and clean up a bunch of uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229803 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 01:10:53 +00:00
Eric Christopher
2b8ccbf2ad Remove the DisasmEnabled AsmPrinter variable and just look it
up on the subtarget where it's set anyhow than looking it up
2-3 times in the same place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229802 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 01:10:49 +00:00
Peter Collingbourne
d93ca09fe0 MC: Remove NullStreamer hook, as it is redundant with NullTargetStreamer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229799 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 00:45:07 +00:00
Peter Collingbourne
99a5e24d34 Introduce Target::createNullTargetStreamer and use it from IRObjectFile.
A null MCTargetStreamer allows IRObjectFile to ignore target-specific
directives. Previously we were crashing.

Differential Revision: http://reviews.llvm.org/D7711

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229797 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 00:45:02 +00:00
Michael Gottesman
8915e014e0 [objc-arc] Introduce the concept of RCIdentity and rename all relevant functions to use that name. NFC.
The RCIdentity root ("Reference Count Identity Root") of a value V is a
dominating value U for which retaining or releasing U is equivalent to
retaining or releasing V. In other words, ARC operations on V are
equivalent to ARC operations on U.

This is a useful property to ascertain since we can use this in the ARC
optimizer to make it easier to match up ARC operations by always mapping
ARC operations to RCIdentityRoots instead of pointers themselves. Then
we perform pairing of retains, releases which are applied to the same
RCIdentityRoot.

In general, the two ways that we see RCIdentical values in ObjC are via:

  1. PointerCasts
  2. Forwarding Calls that return their argument verbatim.

As such in ObjC, two RCIdentical pointers must always point to the same
memory location.

Previously this concept was implicit in the code and various methods
that dealt with this concept were given functional names that did not
conform to any name in the "ARC" model. This often times resulted in
code that was hard for the non-ARC acquanted to understand resulting in
unhappiness and confusion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229796 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 00:42:38 +00:00
Michael Gottesman
db011405b3 [objc-arc-contract] Rename contractRelease => tryToContractReleaseIntoStoreStrong.
NFC. Makes it clearer what this method is actually supposed to do.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229795 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 00:42:34 +00:00
Michael Gottesman
855f109cc0 [objc-arc-contract] Refactor out tryToPeepholeInstruction into its own method. NFC.
The main method of ObjCARCContract is really large and busy. By refactoring this
out, it becomes easier to reason about.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 00:42:30 +00:00
Michael Gottesman
7e1c99b759 [objc-arc-contract] Reorganize the code a bit and make the debug output easier to read.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229793 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 00:42:27 +00:00
Duncan P. N. Exon Smith
eac950e408 IR: Drop scope from MDTemplateParameter
Follow-up to r229740, which removed `DITemplate*::getContext()` after my
upgrade script revealed that scopes are always `nullptr` for template
parameters.  This is the other shoe: drop `scope:` from
`MDTemplateParameter` and its two subclasses.  (Note: a bitcode upgrade
would be pointless, since the hierarchy hasn't been moved into place.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229791 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 00:37:21 +00:00
Eric Christopher
a3fa104c8c Avoid using a self-referential initializer and fix up uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229790 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 00:22:47 +00:00
Eric Christopher
b724ec6c13 80-column fixups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229789 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 00:15:33 +00:00
Eric Christopher
6ec9683959 Remove all use of is64bit off of NVPTXSubtarget and clean up code
accordingly. This changes the constructors of a number of classes
that don't need to know the subtarget's 64-bitness.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229787 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 00:08:27 +00:00
Eric Christopher
c72978539d Remove all use of getDrvInterface off of NVPTXSubtarget and clean
up code accordingly. Delete code that was checking for all cases
of an enum.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229786 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 00:08:23 +00:00
Eric Christopher
9d2ea22e2b Migrate the NVPTX backend asm printer to a per function subtarget.
This involved moving two non-subtarget dependent features (64-bitness
and the driver interface) to the NVPTX target machine and updating
the uses (or migrating around the subtarget use for ease of review).
Otherwise use the cached subtarget or create a default subtarget
based on the TargetMachine cpu and feature string for the module
level assembler emission.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229785 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 00:08:14 +00:00
Duncan P. N. Exon Smith
c2c5e48ad5 IR: Allow MDSubrange to have 'count: -1'
It turns out that `count: -1` is a special value indicating an empty
array, such as `Values` in:

    struct T {
      unsigned Count;
      int Values[];
    };

Handle it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229769 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 23:17:51 +00:00
Reid Kleckner
f89d9b1c75 Add an IR-to-IR test for dwarf EH preparation using opt
This tests the simple resume instruction elimination logic that we have
before making some changes to it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229768 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 23:17:41 +00:00
Andrew Kaylor
642f12778f Style and formatting fixes for r229715
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229758 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 22:52:18 +00:00
Marek Olsak
4f5a891372 R600/SI: Fix READLANE and WRITELANE lane select for VI
VOP2 declares vsrc1, but VOP3 declares src1.
We can't use the same "ins" if the operands have different names in VOP2
and VOP3 encodings.

This fixes a hang in geometry shaders which spill M0 on VI.
(BTW it doesn't look like M0 needs spilling and the spilling seems
duplicated 3 times)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229752 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 22:12:45 +00:00
Marek Olsak
2a0d0dedf0 R600/SI: Simplify verification of AMDGPU::OPERAND_REG_INLINE_C
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229751 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 22:12:41 +00:00
Marek Olsak
342d0d73c0 R600/SI: Remove explicit VOP operand checking
This should be handled by the OperandType checking.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229750 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 22:12:37 +00:00
Duncan P. N. Exon Smith
b5026b0b83 IR: Swap order of name and value in MDEnum
Put the name before the value in assembly for `MDEnum`.  While working
on the testcase upgrade script for the new hierarchy, I noticed that it
"looks nicer" to have the name first, since it lines the names up in the
(somewhat typical) case that they have a common prefix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229747 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 21:16:33 +00:00
Duncan P. N. Exon Smith
a9d82a512f IR: Add MDSubprogram::replaceFunction()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229742 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 20:32:57 +00:00
Duncan P. N. Exon Smith
87356edf74 IR: Drop the scope in DI template parameters
The scope/context is always the compile unit, which we replace with
`nullptr` anyway (via `getNonCompileUnitScope()`).  Drop it explicitly.

I noticed this field was always null while writing testcase upgrade
scripts to transition to the new hierarchy.  Seems wasteful to
transition it over if it's already out-of-use.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229740 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 20:30:45 +00:00
Duncan P. N. Exon Smith
f866bfc6aa Fix -DNDEBUG -Werror build after r229733
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229736 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 19:56:50 +00:00
Reid Kleckner
ae09ebc540 dos2unix the WinEH file and tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229735 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 19:52:46 +00:00
Duncan P. N. Exon Smith
510ccd20a9 IR: isScopeRef() should check isScope()
r229733 removed an invalid use of `DIScopeRef`, so now we can enforce
that a `DIScopeRef` is actually a scope.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229734 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 19:46:02 +00:00
Duncan P. N. Exon Smith
1cfad01081 IR: Avoid DIScopeRef in DIImportedEntity::getEntity()
`DIImportedEntity::getEntity()` currently returns a `DIScopeRef`, but
the nodes it references aren't always `DIScope`s.  In particular, it can
reference global variables.

Introduce `DIDescriptorRef` to avoid the lie.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229733 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 19:39:36 +00:00
Sanjoy Das
6da5a456f4 Partial fix for bug 22589
Don't spend the entire iteration space in the scalar loop prologue if
computing the trip count overflows.  This change also gets rid of the
backedge check in the prologue loop and the extra check for
overflowing trip-count.

Differential Revision: http://reviews.llvm.org/D7715



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229731 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 19:32:25 +00:00
Justin Bogner
798787cea4 InstrProf: Don't combine expansion regions with code regions
This was leading to duplicate counts when a code region happened to
overlap exactly with an expansion. The combining behaviour only makes
sense for code regions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229723 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 19:01:06 +00:00
David Blaikie
59935868d3 Remove unused member variables (-Wunused-private-field)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229722 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 18:52:49 +00:00
Justin Bogner
e0eae15f6c InstrProf: Handle unknown functions if they consist only of zero-regions
This comes up when we generate coverage for a function but don't end
up emitting the function at all - dead static functions or inline
functions that aren't referenced in a particular TU, for example. In
these cases we'd like to show that the function was never called,
which is trivially true.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229717 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 18:40:46 +00:00
Andrew Kaylor
a4976167c4 Adding implementation to outline C++ catch handlers for native Windows 64 exception handling.
Differential Revision: http://reviews.llvm.org/D7363



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229715 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 18:31:51 +00:00
Justin Bogner
94da968134 InstrProf: Make CoverageMapping testable and add a basic unit test
Make CoverageMapping easier to create, so that we can write targeted
unit tests for its internals, and add a some infrastructure to write
these tests. Finally, add a simple unit test for basic functionality.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229709 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 18:01:14 +00:00
Jozef Kolek
2032d755e7 [mips][microMIPS] Make usage of ADDU16 and SUBU16 by code generator
Differential Revision: http://reviews.llvm.org/D7609


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229706 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 17:33:56 +00:00
Jozef Kolek
efea7db0ab [mips][microMIPS] Implement JALX instruction
Differential Revision: http://reviews.llvm.org/D5047


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229702 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 17:15:48 +00:00
Daniel Sanders
7eedd07d5e [mips] Add backend support for Mips32r[35] and Mips64r[35].
Summary:
These ISA's didn't add any instructions so they are almost identical to
Mips32r2 and Mips64r2. Even the ELF e_flags are the same, However the ISA
revision in .MIPS.abiflags is 3 or 5 respectively instead of 2.

Reviewers: vmedic

Reviewed By: vmedic

Subscribers: tomatabacu, llvm-commits, atanasyan

Differential Revision: http://reviews.llvm.org/D7381


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229695 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 16:24:50 +00:00
Kit Barton
31840a62af This patch adds the VSX logical instructions introduced in the Power ISA 2.07. It also removes the added complexity that favors VMX versions of the three instructions.
Phabricator review: http://reviews.llvm.org/D7616

Commiting on Nemanja's behalf.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229694 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 16:21:46 +00:00
Tom Stellard
d0da9ebb0a R600/SI: Don't set isCodeGenOnly = 1 on all instructions
We only need to set this on pseudo instructions which won't
be used by the assembler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229689 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 16:08:17 +00:00
Tom Stellard
d1971ae8ba R600/SI: Add missing VOP1 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229688 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 16:08:15 +00:00
Tom Stellard
16b731f19f R600/SI: Add missing VOP2 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229687 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 16:08:14 +00:00
Tom Stellard
585290a32a R600/SI: Add definition for S_CBRANCH_G_FORK
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229686 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 16:08:13 +00:00