Commit Graph

28002 Commits

Author SHA1 Message Date
Devang Patel
682e0e6a72 If location where the function was inlined is not know then do not emit debug info describing inlinied region.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69252 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-16 01:31:54 +00:00
Dale Johannesen
c671d892ab Eliminate zext over (iv | const) or (signed iv),
and sext over (iv | const), if a longer iv is
available.  Allow expressions to have more than
one zext/sext parent.  All from OpenSSL.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69241 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 23:31:51 +00:00
Devang Patel
7d2f972f59 s/RootDbgScope/FunctionDbgScope/g
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69216 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 20:41:31 +00:00
Dale Johannesen
d3325d2897 Eliminate zext over (iv & const) or ((iv+const)&const)
if a longer iv is available.  These subscript forms are
not common; they're a bottleneck in OpenSSL.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69215 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 20:41:02 +00:00
Chris Lattner
d7fd2126c2 teach EscapeString and UnescapeString to handle ".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69211 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 20:12:52 +00:00
Devang Patel
8818b8f443 Add DISubprogram is not null check.
This fixes test/CodeGen//2009-01-21-invalid-debug-info.m test case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69210 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 20:11:08 +00:00
Dan Gohman
c23e496879 Generalize one of the SelectionDAG::ReplaceAllUsesWith overloads
to support replacing a node with another that has a superset of
the result types. Use this instead of calling
ReplaceAllUsesOfValueWith for each value.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69209 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 20:06:30 +00:00
Dan Gohman
df7dfc7715 Fix 80-column violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69204 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 19:48:57 +00:00
Dan Gohman
25174963f6 Add a folding table entry for MOV8rr_NOREX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69203 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 19:48:28 +00:00
Devang Patel
c782ad055e Check isInlinedSubroutine() before creating DW_TAG_inlined_subroutine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69202 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 19:42:57 +00:00
Dan Gohman
9407cd4ede Fix MachineInstr::getNumExplicitOperands to count
variadic operands correctly. Patch by Jakob Stoklund Olesen!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69190 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 17:59:11 +00:00
Nick Lewycky
300e36503c Limit the number of times we're willing to chase pointers. Removes an O(n^2)
problem from instcombine.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69151 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 06:23:41 +00:00
Dan Gohman
6288b93f00 Fix X86MachineFunctionInfo's doxygen comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69127 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 01:20:18 +00:00
Dan Gohman
33f1c68cba Move MachineRegisterInfo::setRegClass out of line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69126 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 01:19:35 +00:00
Dan Gohman
593ea05957 Move MachineJumpTableInfo::ReplaceMBBInJumpTables out of line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69125 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 01:18:49 +00:00
Dan Gohman
3bc1a3735f Give RemoveRegOperandFromRegInfo a comment and move the
code out of line.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69124 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 01:17:37 +00:00
Dale Johannesen
dd1f9e4bf6 Enhance induction variable code to remove the
sext around sext(shorter IV + constant), using a
longer IV instead, when it can figure out the
add can't overflow.  This comes up a lot in
subscripting; mainly affects 64 bit.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69123 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 01:10:12 +00:00
Evan Cheng
aa230a41dc Avoid making the transformation enabled by my last patch if the new destinations have phi nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69121 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 00:43:54 +00:00
Devang Patel
517576d6f9 While inlining, clone llvm.dbg.func.start intrinsic and adjust
llvm.dbg.region.end instrinsic. This nested llvm.dbg.func.start/llvm.dbg.region.end pair now enables DW_TAG_inlined_subroutine support in code generator.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69118 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 00:17:06 +00:00
Devang Patel
1be3eccecb Construct and emit DW_TAG_inlined_subroutine DIEs for inlined subroutine scopes (only in FastISel mode).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69116 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 00:10:26 +00:00
Dan Gohman
aaa1fdb271 Do for GR16_NOREX what r69049 did for GR8_NOREX, to avoid trouble with
the local register allocator.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69115 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 00:10:16 +00:00
Devang Patel
af5b6bb6a5 Add a method to check that the subprogram holds debug info for the given Function or not.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69113 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 00:06:07 +00:00
Dan Gohman
6d9305c7fd Add a new MOV8rr_NOREX, and make X86's copyRegToReg use it when
either the source or destination is a physical h register.

This fixes sqlite3 with the post-RA scheduler enabled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69111 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 00:04:23 +00:00
Dan Gohman
a2f3703efd GR8_NOREX can contain the H registers, since they don't require
REX prefixes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69108 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 00:00:48 +00:00
Evan Cheng
df2f1189a3 Optimize conditional branch on i1 phis with non-constant inputs.
This turns:

eq:
        %3 = icmp eq i32 %1, %2
        br label %join

ne:
        %4 = icmp ne i32 %1, %2
        br label %join

join:
        %5 = phi i1 [%3, %eq], [%4, %ne]
        br i1 %5, label %yes, label %no

=>

eq:
        %3 = icmp eq i32 %1, %2
        br i1 %3, label %yes, label %no

ne:
        %4 = icmp ne i32 %1, %2
        br i1 %4, label %yes, label %no


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69102 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-14 23:40:03 +00:00
Dan Gohman
62ad138d70 For the h-register addressing-mode trick, use the correct value for
any non-address uses of the address value. This fixes 186.crafty.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69094 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-14 22:45:05 +00:00
Evan Cheng
00f16283cf Mac OS X 10.6 and above do not use key manager to register EH frames.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69090 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-14 22:31:59 +00:00
Dan Gohman
5ec3b427c8 When the result of an EXTRACT_SUBREG, INSERT_SUBREG, or SUBREG_TO_REG
operator is used by a CopyToReg to export the value to a different
block, don't reuse the CopyToReg's register for the subreg operation
result if the register isn't precisely the right class for the
subreg operation.

Also, rename the h-registers.ll test, now that there are more
than one.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69087 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-14 22:17:14 +00:00
Mikhail Glushenkov
0526653956 Call CreateProcess with bInheritHandles = TRUE.
Makes llvmc show error messages printed by child processes when run from the
Cygwin/MSYS shell. Since ExecuteAndWait does not return until the child program
has finished execution, this change should be harmless.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69082 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-14 21:31:36 +00:00
Mikhail Glushenkov
bd50a16723 Delete trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69081 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-14 21:31:14 +00:00
Evan Cheng
b3f5bfe37f Some of GR8_NOREX registers are only available in 64-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69049 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-14 16:57:43 +00:00
Sanjiv Gupta
85be408a32 Handle aggregate type arguments to direct and indirect calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69022 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-14 02:49:52 +00:00
Owen Anderson
0b2a153968 LoopIndexSplit needs to inform the loop pass manager of the instructions it is
deleting, not just the basic block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69011 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-14 01:04:19 +00:00
Dale Johannesen
ec65a7d89b Do not force asm's to be chained if they don't touch
memory and aren't volatile.  This was interfering with
good scheduling.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69008 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-14 00:56:56 +00:00
Evan Cheng
87d696a4d2 Fix PR3934 part 2. findOnlyInterestingUse() was not setting IsCopy and IsDstPhys which are returned by value and used by callee. This happened to work on the earlier test cases because of a logic error in the caller side.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69006 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-14 00:32:25 +00:00
Daniel Dunbar
4cbb173d6c Make these errors more noticable in build logs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68998 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 22:26:09 +00:00
Bob Wilson
b1303d05a8 Change SelectionDAG type legalization to allow BUILD_VECTOR operands to be
promoted to legal types without changing the type of the vector.  This is
following a suggestion from Duncan
(http://lists.cs.uiuc.edu/pipermail/llvmdev/2009-February/019923.html).
The transformation that used to be done during type legalization is now
postponed to DAG legalization.  This allows the BUILD_VECTORs to be optimized
and potentially handled specially by target-specific code.

It turns out that this is also consistent with an optimization done by the
DAG combiner: a BUILD_VECTOR and INSERT_VECTOR_ELT may be combined by
replacing one of the BUILD_VECTOR operands with the newly inserted element;
but INSERT_VECTOR_ELT allows its scalar operand to be larger than the
element type, with any extra high bits being implicitly truncated.  The
result is a BUILD_VECTOR where one of the operands has a type larger the
the vector element type.

Any code that operates on BUILD_VECTORs may now need to be aware of the
potential type discrepancy between the vector element type and the
BUILD_VECTOR operands.  This patch updates all of the places that I could
find to handle that case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68996 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 22:05:19 +00:00
Dan Gohman
88c7af096b Rename COPY_TO_SUBCLASS to COPY_TO_REGCLASS, and generalize
it accordingly. Thanks to Jakob Stoklund Olesen for pointing
out how this might be useful.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68986 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 21:06:25 +00:00
Bob Wilson
26cbf9eb99 Refactor some code in SelectionDAGLegalize::ExpandBUILD_VECTOR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68981 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 20:20:30 +00:00
Evan Cheng
3005ed6048 PR3934: Fix a bogus two-address pass assertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68979 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 20:04:24 +00:00
Devang Patel
48c7fa21a3 Right now, Debugging information to encode scopes (DW_TAG_lexical_block) relies on DBG_LABEL. Unfortunately this intefers with the quality of optimized code.
This patch updates dwarf writer to encode scoping information in DWARF only in FastISel mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68973 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 18:13:16 +00:00
Devang Patel
0f7fef3872 Reapply 68847.
Now debug_inlined section is covered by TAI->doesDwarfUsesInlineInfoSection(), which is false by default.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68964 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 17:02:03 +00:00
Dan Gohman
21e3dfbc86 Implement x86 h-register extract support.
- Add patterns for h-register extract, which avoids a shift and mask,
   and in some cases a temporary register.
 - Add address-mode matching for turning (X>>(8-n))&(255<<n), where
   n is a valid address-mode scale value, into an h-register extract
   and a scaled-offset address.
 - Replace X86's MOV32to32_ and related instructions with the new
   target-independent COPY_TO_SUBREG instruction.

On x86-64 there are complicated constraints on h registers, and
CodeGen doesn't currently provide a high-level way to express all of them,
so they are handled with a bunch of special code. This code currently only
supports extracts where the result is used by a zero-extend or a store,
though these are fairly common.

These transformations are not always beneficial; since there are only
4 h registers, they sometimes require extra move instructions, and
this sometimes increases register pressure because it can force out
values that would otherwise be in one of those registers. However,
this appears to be relatively uncommon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68962 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 16:09:41 +00:00
Dan Gohman
f8c7394781 Add a new TargetInstrInfo MachineInstr opcode, COPY_TO_SUBCLASS.
This will be used to replace things like X86's MOV32to32_.

Enhance ScheduleDAGSDNodesEmit to be more flexible and robust
in the presense of subregister superclasses and subclasses. It
can now cope with the definition of a virtual register being in
a subclass of a use.

Re-introduce the code for recording register superreg classes and
subreg classes. This is needed because when subreg extracts and
inserts get coalesced away, the virtual registers are left in
the correct subclass.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68961 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 15:38:05 +00:00
Dan Gohman
8433df36fb Remove x86's special-case handling for ISD::TRUNCATE and
ISD::SIGN_EXTEND_INREG. Tablegen-generated code can handle
these cases, and the scheduling issues observed earlier
appear to be resolved now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68959 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 15:29:31 +00:00
Dan Gohman
3cf9b3e455 Fix copy+pastos in comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68958 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 15:28:29 +00:00
Dan Gohman
70f2f65aac Don't abort on an aliasing physical register that does not have
a live interval. This is needed for some upcoming subreg changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68956 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 15:22:29 +00:00
Dan Gohman
9a77a92859 When assigning a physical register to a MachineOperand, set
the subreg field to 0, since the subreg field is only used
for virtual register subregs. This doesn't change
current functionality; it just eliminates bogus noise from
debug output.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68955 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 15:21:32 +00:00
Dan Gohman
ee30047386 List the l registers before h registers, for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68954 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 15:18:42 +00:00
Dan Gohman
6ed0e20eb2 Add an assertion to verify that a copy was actually emitted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68953 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 15:16:56 +00:00