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4 Commits

Author SHA1 Message Date
Elena Demikhovsky
1f0a0e314d AVX-512: Added implementation of CONCAT_VECTORS for v8i1 vectors (by Alexey Bader). 
Added implementation of "truncate" from integer type (i64/i32/i16/i8) to i1.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197482 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-12-17 08:33:15 +00:00
Juergen Ributzka
d7174719a9 [X86] Perform VSELECT DAG combines also before DAG type legalization. 
If the DAG already has only legal types, then the second round of DAG combines
is skipped. In this case VSELECT+SETCC patterns that match a more efficient
instruction (e.g. min/max) are never recognized.

This fix allows VSELECT+SETCC combines if the types are already legal before DAG
type legalization.

Reviewer: Nadav

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190105 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-05 23:02:56 +00:00
Elena Demikhovsky
f12df0ad50 AVX-512: added arithmetic and logical operations. 
ADD, SUB, MUL integer and FP types. OR, AND, XOR.
Added embeded broadcast form for these instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188673 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-19 13:26:14 +00:00
Elena Demikhovsky
4d36bd80e6 AVX-512: Added CMP and BLEND instructions. 
Lowering for SETCC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188265 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-13 13:24:07 +00:00