llvm-6502

6502/llvm-6502

Fork 0

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-16 11:30:51 +00:00

Commit Graph

Author	SHA1	Message	Date
Matt Arsenault	a140448780	R600/SI: Move SIFixSGPRCopies to inst selector passes This should expose more of the actually used VALU instructions to the machine optimization passes. This also should help getting i1 handling into a better state. For not entirly understood reasons, this fixes the split-scalar-i64-add.ll test where a 64-bit add would only partially be moved to the VALU resulting in use of undefined VCC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222256 91177308-0d34-0410-b5e6-96231b3b80d8	2014-11-18 21:06:58 +00:00
Matt Arsenault	9b0ace6364	R600/SI: Add another failing testcase for i1 copies It's not handling phis. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220371 91177308-0d34-0410-b5e6-96231b3b80d8	2014-10-22 05:30:42 +00:00

Author

SHA1

Message

Date

Matt Arsenault

a140448780

R600/SI: Move SIFixSGPRCopies to inst selector passes

This should expose more of the actually used VALU
instructions to the machine optimization passes.

This also should help getting i1 handling into a better state.
For not entirly understood reasons, this fixes the split-scalar-i64-add.ll
test where a 64-bit add would only partially be moved to the VALU
resulting in use of undefined VCC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222256 91177308-0d34-0410-b5e6-96231b3b80d8

2014-11-18 21:06:58 +00:00

Matt Arsenault

9b0ace6364

R600/SI: Add another failing testcase for i1 copies

It's not handling phis.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220371 91177308-0d34-0410-b5e6-96231b3b80d8

2014-10-22 05:30:42 +00:00

2 Commits