Akira Hatanaka
056c51e598
Fix bugs in lowering of FCOPYSIGN nodes.
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- FCOPYSIGN nodes that have operands of different types were not handled.
- Different code was generated depending on the endianness of the target.
Additionally, code is added that emits INS and EXT instructions, if they are
supported by target (they are R2 instructions).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154540 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 22:13:04 +00:00
Akira Hatanaka
f06cb2b207
Add patterns for matching immediates whose lower 16-bit is cleared. These
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patterns emit a single LUi instruction instead of a pair of LUi and ORi.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146900 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-19 20:21:18 +00:00
Akira Hatanaka
7398bf01c2
Modify LowerFCOPYSIGN to handle Mips64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146080 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 21:48:50 +00:00
Dan Gohman
8c2d270ae8
Change the default scheduler from Latency to ILP, since Latency
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is going away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142810 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-24 17:45:02 +00:00
Akira Hatanaka
33ff5aeaa8
Fix test cases.
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Generate code for Mips32r1 unless a Mips32r2 feature is tested.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139433 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-09 23:14:58 +00:00
Akira Hatanaka
9c3d57c45e
Custom-lower FCOPYSIGN nodes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132074 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 19:32:07 +00:00
