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6f34b43292
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6396 Commits

Author SHA1 Message Date
Evan Cheng
6f34b43292 Fixed a FuseTwoAddrInst() bug: consider GlobalAddress and JumpTableIndex 
in addition to immediate operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30205 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 21:08:13 +00:00
Rafael Espindola
0a200600e7 implement shl and sra 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30191 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 17:36:23 +00:00
Chris Lattner
40f4ba5e71 Use __USER_LABEL_PREFIX__ to get the prefix added by the current host. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30190 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 17:03:56 +00:00
Rafael Espindola
4e30764d55 add the eor (xor) instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30189 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 16:59:47 +00:00
Jim Laskey
f45c25f720 Missing tab 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30188 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 13:06:56 +00:00
Rafael Espindola
5c2aa0a4d8 implement unconditional branches 
fix select.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30186 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 12:47:03 +00:00
Evan Cheng
36978b9c61 Remove TEST64mr. It's same as TEST64rm since and is commutative. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30178 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 06:56:55 +00:00
Evan Cheng
25ab690a43 Committing X86-64 support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30177 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 06:48:29 +00:00
Nate Begeman
6fe6084ebf We actually do support object file writing, so don't return true (error) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30173 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 03:42:15 +00:00
Evan Cheng
8cf723d8eb - Identify a vector_shuffle that can be turned into an undef, e.g. 
shuffle V1, <undef>, <undef, undef, 4, 5>
- Fix some suspicious logic into LowerVectorShuffle that cause less than
  optimal code by failing to identify MOVL (move to lowest element of a
  vector).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30171 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 01:50:06 +00:00
Jim Laskey
fde1b3bb2f 1. Remove condition on delete. 
2. Protect and outline createTargetAsmInfo.

3. Misc. kruft.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30169 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 23:39:26 +00:00
Chris Lattner
2dd538c2d2 add a new value for the command line optn 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30165 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 22:32:28 +00:00
Chris Lattner
cdb341dcfa Fix a cross-build issue. The asmsyntax shouldn't be affected by the build 
host, it should be affected by the target.  Allow the command line option to
override in either case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30164 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 22:29:41 +00:00
Jim Laskey
a0f3d17daa Make target asm info a property of the target machine. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30162 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 22:06:40 +00:00
Jim Laskey
8e8de8f776 Break out target asm info into separate files. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30161 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 22:05:02 +00:00
Chris Lattner
ffc0b2663e Eliminate X86ISD::TEST, using X86ISD::CMP instead. Match X86ISD::CMP patterns 
using test, which provides nice simplifications like:

-       movl %edi, %ecx
-       andl $2, %ecx
-       cmpl $0, %ecx
+       testl $2, %edi
        je LBB1_11      #cond_next90

There are a couple of dagiselemitter deficiencies that this exposes, they will
be handled later.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30156 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 20:33:45 +00:00
Chris Lattner
b14ca605d7 Some notes on better load folding we could do 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30155 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 20:32:01 +00:00
Evan Cheng
ec3bc39413 Consistency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30152 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 19:03:48 +00:00
Jim Laskey
05a059d5d8 Make the x86 asm flavor part of the subtarget info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30146 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 12:23:47 +00:00
Evan Cheng
95971c51b0 Clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30140 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 01:17:57 +00:00
Evan Cheng
48ff2fb129 Watch out for variable_ops instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30135 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-06 20:32:45 +00:00
Evan Cheng
3530bafe00 Variable ops instructions may ignore the last few operands for code emission. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30134 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-06 20:24:14 +00:00
Jim Laskey
7c95ad4fb0 Oops - forgot to update banner. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30131 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-06 19:21:41 +00:00
Jim Laskey
ec0d9fe2b2 Separate target specifc asm properties from asm printers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30127 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-06 18:35:33 +00:00
Jim Laskey
563321a258 Separate target specific asm properties from the asm printers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30126 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-06 18:34:40 +00:00
Rafael Espindola
b52b54d4af add the orr instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30125 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-06 18:03:12 +00:00
Chris Lattner
6cdb1ea610 Bugfix to work with the two-addr changes that have been made in the tree recently 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30121 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 20:27:32 +00:00
Evan Cheng
2f5993bcf1 Fix a few dejagnu failures. e.g. fast-cc-merge-stack-adj.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30113 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 08:32:49 +00:00
Evan Cheng
23b3122c44 JIT encoding bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30112 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 05:59:25 +00:00
Chris Lattner
0e42d81a83 Update the X86 JIT to make it work with the new two-addr changes. This also 
adds assertions that check to make sure every operand gets emitted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30110 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 02:52:35 +00:00
Chris Lattner
09e460662a Completely eliminate def&use operands. Now a register operand is EITHER a 
def operand or a use operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30109 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 02:31:13 +00:00
Chris Lattner
2926869b4a Fix a long-standing wart in the code generator: two-address instruction lowering 
actually *removes* one of the operands, instead of just assigning both operands
the same register.  This make reasoning about instructions unnecessarily complex,
because you need to know if you are before or after register allocation to match
up operand #'s with the target description file.

Changing this also gets rid of a bunch of hacky code in various places.

This patch also includes changes to fold loads into cmp/test instructions in
the X86 backend, along with a significant simplification to the X86 spill
folding code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30108 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 02:12:02 +00:00
Andrew Lenharth
89c0b4a90e jmp_bufs are this big on alpha. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30107 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 00:22:25 +00:00
Rafael Espindola
3a02f020eb add support for returning 64bit values 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30103 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-04 19:05:01 +00:00
Chris Lattner
2130b99eb2 Fix some X86 JIT failures. This should really come from TargetJITInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30102 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-04 18:48:41 +00:00
Duraid Madina
2a0013f59f add setJumpBufSize() and setJumpBufAlignment() to target-lowering. 
Call these from your backend to enjoy setjmp/longjmp goodness, see
lib/Target/IA64/IA64ISelLowering.cpp for an example


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30095 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-04 06:21:35 +00:00
Chris Lattner
1911fd4f85 Completely rearchitect the interface between targets and the pass manager. 
This pass:

1. Splits TargetMachine into TargetMachine (generic targets, can be implemented
any way, like the CBE) and LLVMTargetMachine (subclass of TM that is used by
things using libcodegen and other support).
2. Instead of having each target fully populate the passmgr for file or JIT
   output, move all this to common code, and give targets hooks they can
   implement.
3. Commonalize the target population stuff between file emission and JIT
   emission.
4. All (native code) codegen stuff now happens in a FunctionPassManager, which
   paves the way for "fast -O0" stuff in the CFE later, and now LLC could
   lazily stream .bc files from disk to use less memory.
5. There are now many fewer #includes and the targets don't depend on the
   scalar xforms or libanalysis anymore (but codegen does).
6. Changing common code generator pass ordering stuff no longer requires
   touching all targets.
7. The JIT now has the option of "-fast" codegen or normal optimized codegen,
   which is now orthogonal to the fact that JIT'ing is being done.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30081 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-04 04:14:57 +00:00
Chris Lattner
dd842e12e1 Add accessor 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30080 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-04 04:08:58 +00:00
Chris Lattner
3199af2874 remove #include 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30078 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-04 04:06:01 +00:00
Chris Lattner
c4fa386471 Simplify target construction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30070 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-03 18:44:02 +00:00
Rafael Espindola
bc4cec9a62 add the SETULT condition code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30067 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-03 13:19:16 +00:00
Rafael Espindola
5f450d2948 add more condition codes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30056 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-02 20:24:25 +00:00
Evan Cheng
1453de5aa9 Oops. Bad typo. Without the check of N1.hasOneUse() bad things can happen. 
Suppose the TokenFactor can reach the Op:

       [Load chain]
           ^
           |
         [Load]
         ^    ^
         |    |
        /      \-
       /         |
      /          [Op]
     /          ^ ^
     |        ..  |
     |       /    |
   [TokenFactor]  |
       ^          |
       |          |
        \        /
         \      /
         [Store]

If we move the Load below the TokenFactor, we would have created a cycle in
the DAG.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30040 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-01 22:52:28 +00:00
Chris Lattner
aca36b9329 Use a couple of multiclass patterns to factor some integer ops. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30039 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-01 22:28:02 +00:00
Chris Lattner
1662239a5e remove a bunch of comments 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30038 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-01 22:16:22 +00:00
Evan Cheng
c9676deb23 Minor asm fix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29965 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 22:14:48 +00:00
Evan Cheng
4a888584ea Remove dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29962 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 21:42:58 +00:00
Evan Cheng
780413d462 Don't performance load/op/store transformation if op produces a floating point 
or vector result. X86 does not have load/mod/store variants of those
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29957 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 18:37:37 +00:00
Evan Cheng
e50794adda - Enable x86 isel preprocessing by default unless -fast is specified. 
- Also disable isel load folding if -fast.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29956 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 18:28:33 +00:00
Jim Laskey
ce50a165c7 Handle callee saved registers in dwarf frame info (lead up to exception 
handling.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29954 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 16:24:26 +00:00