Commit Graph

45862 Commits

Author SHA1 Message Date
Jan Sjödin
01dff96461 Add constructors to MCElfStreamer and MCObjectStreamer to take an extra MCAssembler * argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127343 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 17:33:05 +00:00
Andrew Trick
e62289b98f When SCEV can determine the loop test is X < X, set ExactBECount=0.
When ExactBECount is a constant, use it for MaxBECount.
When MaxBECount cannot be computed, replace it with ExactBECount.
Fixes PR9424.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127342 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 17:29:58 +00:00
Andrew Trick
635f71880b whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127340 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 17:23:39 +00:00
Benjamin Kramer
d7cdc3e1f9 Fix typo, make helper static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127335 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 16:19:12 +00:00
Benjamin Kramer
8104163fd1 Remove unused virtual dtor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127331 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 14:20:28 +00:00
NAKAMURA Takumi
3ca99435e9 Target/X86: Tweak va_arg for Win64 not to miss taking va_start when number of fixed args > 4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127328 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 11:33:15 +00:00
Nick Lewycky
a0e2f38b25 Fix two cases I forgot to update when doing a mental "getSwappedPredicate".
Thanks Duncan Sands!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127323 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 08:20:06 +00:00
Cameron Zwarich
032c10fee2 Fix a crasher introduced by r127317 that is seen on the bots when using an
alloca as both integer and floating-point vectors of the same size. Bugpoint is
not cooperating with me, but I'll try to find a manual testcase tomorrow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127320 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 07:34:11 +00:00
Nick Lewycky
84dd4fa2e3 Add another micro-optimization. Apologies for the lack of refactoring, but I
gave up when I realized I couldn't come up with a good name for what the
refactored function would be, to describe what it does.

This is PR9343 test12, which is test3 with arguments reordered. Whoops!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127318 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 06:26:03 +00:00
Cameron Zwarich
b2fd770136 Add support to scalar replacement for partial vector accesses of an alloca, e.g.
a union of a float, <2 x float>, and <4 x float>. This mostly comes up with the
use of vector intrinsics, especially in NEON when programmers know the layout of
the register file. This enables codegen to eliminate a lot of the subregister
traffic it would otherwise generate.

This commit only enables this for a small number of floating-point cases, but a
lot more integer cases. I assume this is okay for all ports, but I did not do
extensive testing of the quality of code involving i512 vectors and the like. If
there is a use case where this generates worse code than before, let me know and
we can scale it back.

This fixes <rdar://problem/9036264>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127317 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 05:43:05 +00:00
Cameron Zwarich
c9ecd14cee Move vector type merging to a separate function in preparation for it getting
more complicated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127316 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 05:43:01 +00:00
Matt Beaumont-Gay
ab2ee2ea75 Add a virtual dtor to Delegate to silence -Wnon-virtual-dtor
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127311 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 04:02:15 +00:00
Eli Friedman
c6b018b737 PR9346: Prevent SimplifyDemandedBits from incorrectly introducing
INT_MIN % -1.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127306 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 01:28:35 +00:00
Jakob Stoklund Olesen
92a55f4bdd Add a LiveRangeEdit::Delegate protocol.
This will we used for keeping register allocator data structures up to date
while LiveRangeEdit is trimming live intervals.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127300 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 00:57:29 +00:00
Eli Friedman
2adc5b6a17 PR9420; an instruction before an unreachable is guaranteed not to have any
reachable uses, but there still might be uses in dead blocks.  Use the
standard solution of replacing all the uses with undef.  This is
a rare case because it's very sensitive to phase ordering in SimplifyCFG.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127299 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 00:48:33 +00:00
Bill Wendling
620d0cc7ac * Correct encoding for VSRI.
* Add tests for VSRI and VSLI.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127297 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 00:33:17 +00:00
Jakob Stoklund Olesen
f46aa914c8 Delete dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127295 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 00:07:39 +00:00
Bill Wendling
c04a9dea78 Correct the encoding for VRSRA and VSRA instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127294 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09 00:00:35 +00:00
Bill Wendling
7c6b608a7c * Fix VRSHR and VSHR to have the correct encoding for the immediate.
* Update the NEON shift instruction test to expect what 'as' produces.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127293 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08 23:48:09 +00:00
Jakob Stoklund Olesen
5881799d0c Delete dead code after rematerializing.
LiveRangeEdit::eliminateDeadDefs() will eventually be used by coalescing,
splitting, and spilling for dead code elimination. It can delete chains of dead
instructions as long as there are no dependency loops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127287 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08 22:46:11 +00:00
Devang Patel
5aa3fa6d82 llvm.dbg.declare intrinsic does not use any llvm::Values. It's magic!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127282 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08 22:12:11 +00:00
Jakob Stoklund Olesen
5bf76cd119 Fix the build for MSVC 9 whose upper_bound() wants to compare elements in the sorted array.
Patch by Olaf Krzikalla!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127264 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08 19:37:54 +00:00
Eric Christopher
29449448b0 Fix some latent bugs if the nodes are unschedulable. We'd gotten away
with this before since none of the register tracking or nightly tests
had unschedulable nodes.

This should probably be refixed with a special default Node that just
returns some "don't touch me" values.

Fixes PR9427


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127263 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08 19:35:47 +00:00
Oscar Fuentes
3aefa7771d Revert "Make a comparator's argument `const'. This fixes the build for
MSVC 9."

The "fix" was meaningless.

This reverts commit r127245.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127260 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08 19:26:21 +00:00
Jim Grosbach
8270da8baf Darwin 'as' silently ignores the '.ident' directive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127258 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08 19:17:19 +00:00
Benjamin Kramer
f337fb2fa8 Reduce vector reallocations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127254 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08 17:28:36 +00:00
Benjamin Kramer
c175a4bd7e X86: Fix the (saddo/ssub x, 1) -> incl/decl selection to check the right operand for 1.
Found by inspection.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127247 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08 15:20:20 +00:00
Justin Holewinski
c6f24f4086 PTX: Add intrinsic support for ntid, ctaid, and nctaid registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127246 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08 14:10:18 +00:00
Oscar Fuentes
86e4eeb6c7 Make a comparator's argument `const'. This fixes the build for MSVC 9.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127245 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08 13:52:07 +00:00
Duncan Sands
606199fb85 Fix PR9331. Simplified version of a patch by Jakub Staszak.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127243 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08 12:39:03 +00:00
NAKAMURA Takumi
c61ac5120d lib/Support/regcomp.c: Fix cygwin warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127241 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08 12:25:29 +00:00
Nick Lewycky
dcf77575d2 Reorder comments to put them the right way around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127220 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08 06:29:47 +00:00
Devang Patel
290342a157 While sinking an instruction, do not lose llvm.dbg.value intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127214 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08 03:06:19 +00:00
Eric Christopher
7c2cdb1c05 Turn on list-ilp scheduling by default on x86 and x86-64, fix up
testcases accordingly. Some are currently xfailed and will be filed
as bugs to be fixed or understood.

Performance results:

roughly neutral on SPEC
some micro benchmarks in the llvm suite are up between 100 and 150%, only
a pair of regressions that are due to be investigated

john-the-ripper saw:
10% improvement in traditional DES
8% improvement in BSDI DES
59% improvement in FreeBSD MD5
67% improvement in OpenBSD Blowfish
14% improvement in LM DES

Small compile time impact.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127208 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08 02:42:25 +00:00
Andrew Trick
0bf56c821c Further improvements to pre-RA-sched=list-ilp.
This change uses the MaxReorderWindow for both height and depth, which
tends to limit the negative effects of high register pressure.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127203 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08 01:51:56 +00:00
Bob Wilson
79f56c9618 Fix a compiler crash where a Glue value had multiple uses. Radar 9049552.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127198 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08 01:17:20 +00:00
Bob Wilson
1b772f9962 Fix comment typos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127197 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08 01:17:16 +00:00
Bill Wendling
3116dce338 Rename the narrow shift right immediate operands to "shr_imm*" operands. Also
expand the testing of the narrowing shift right instructions.

No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127193 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-07 23:38:41 +00:00
Jakob Stoklund Olesen
0d8ccaa5c8 Let shrinkToUses optionally return a list of now dead machine instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127192 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-07 23:29:10 +00:00
Devang Patel
cd77a50e63 Preserve line no. info.
Radar 9097659


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127182 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-07 22:43:45 +00:00
Jakob Stoklund Olesen
1973b3e254 Make the UselessRegs argument optional in the LiveRangeEdit constructor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127181 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-07 22:42:16 +00:00
Cameron Zwarich
be2119e8e2 Move getRegPressureLimit() from TargetLoweringInfo to TargetRegisterInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127175 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-07 21:56:36 +00:00
Jakob Stoklund Olesen
a9d5c2715b Handle the special case of registers begin redefined by early-clobber defs.
In this case, the value need to be available at the load index instead of the
normal use index.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127167 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-07 18:56:16 +00:00
Owen Anderson
6154f6c929 Use the correct LHS type when determining the legalization of a shift's RHS type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127163 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-07 18:29:47 +00:00
Justin Holewinski
a6428a401b ptx: Fix calling convention printing in AsmWriter.cpp
This allows LLVM IR using ptx_kernel or ptx_device calling
conventions to be properly printed when emitted in text form.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127157 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-07 14:32:30 +00:00
Nick Lewycky
c14bc77315 Add more analysis of the sign bit of an srem instruction. If the LHS is negative
then the result could go either way. If it's provably positive then so is the
srem. Fixes PR9343 #7!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127146 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-07 01:50:10 +00:00
NAKAMURA Takumi
19b6c73878 Windows/PathV2.inc: Eliminate redundant condition. DWORD is unsigned.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127140 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-07 00:12:53 +00:00
Rafael Espindola
1b5ec068f5 Don't internalize available_externally functions. We already did the right
thing for variables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127138 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-06 23:41:34 +00:00
Eric Christopher
b43034d700 Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127131 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-06 21:13:45 +00:00
Nick Lewycky
d01f50f42c ConstantInt has some getters which return ConstantInt's or ConstantVector's of
the value splatted into every element. Extend this to getTrue and getFalse which
by providing new overloads that take Types that are either i1 or <N x i1>. Use
it in InstCombine to add vector support to some code, fixing PR8469!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127116 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-06 03:36:19 +00:00