Benjamin Kramer
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d25ec760cb
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X86: cvtpi2ps is just an SSE instruction with MMX operands. It has no AVX equivalent.
Give it the right register format so we can also emit it when AVX is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183971 91177308-0d34-0410-b5e6-96231b3b80d8
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2013-06-14 09:31:41 +00:00 |
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Manman Ren
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4c74a956b2
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X86 MMX: optimize transfer from mmx to i32
We used to generate a store (movq) + a load.
Now we use movd.
rdar://9946746
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167056 91177308-0d34-0410-b5e6-96231b3b80d8
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2012-10-30 22:15:38 +00:00 |
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Craig Topper
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39f227e4dd
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Don't disable MMX support when AVX is enabled. Fix predicates for MMX instructions that were added along with SSE instructions to check for AVX in addition to SSE level.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147762 91177308-0d34-0410-b5e6-96231b3b80d8
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2012-01-09 00:11:29 +00:00 |
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Bill Wendling
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0659b045cf
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PSHUFW is in SSE, not SSSE3.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115691 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-10-05 21:58:12 +00:00 |
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Chris Lattner
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ece290226a
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unbreak buildbot
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115476 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-10-03 20:02:48 +00:00 |
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Bill Wendling
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8e956f7e3e
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Add test to make sure that the MMX intrinsic calls make it out the other end in
tact.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115458 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-10-03 03:30:30 +00:00 |
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