Commit Graph

52533 Commits

Author SHA1 Message Date
Jim Grosbach
74423e32ce ARM assemly parsing and validation of IT instruction.
"Although a Thumb2 instruction, the IT mnemonic shall be permitted in
ARM mode, and the condition verified to match the condition code(s)
on the following instruction(s)."

PR11853

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148969 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 19:52:01 +00:00
Nick Lewycky
0c8515f096 Use precomputed BB size instead of BB->size().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148964 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 18:54:13 +00:00
Chris Lattner
9748479590 fix a bug I introduced in r148929, this is not a splat!
Thanks to Eli for noticing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148947 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 09:56:22 +00:00
Nick Lewycky
6c00c6a181 Gracefully degrade precision in branch probability numbers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148946 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 09:43:14 +00:00
Nick Lewycky
6977e79526 Support pointer comparisons against constants, when looking at the inline-cost
savings from a pointer argument becoming an alloca. Sometimes callees will even
compare a pointer to null and then branch to an otherwise unreachable block!
Detect these cases and compute the number of saved instructions, instead of
bailing out and reporting no savings.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148941 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 08:27:40 +00:00
Chris Lattner
a1f00f4d48 use Constant::getAggregateElement to simplify a bunch of code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148934 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 06:48:06 +00:00
Craig Topper
969ba287cd Custom lower PSIGN and PSHUFB intrinsics to their corresponding target specific nodes so we can remove the isel patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148933 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 06:43:11 +00:00
Chris Lattner
3d5ed2250e constify some methods and add a new Constant::getAggregateElement
helper method for the common operation of extracting an element
out of a constant aggregate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148931 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 06:16:32 +00:00
Chris Lattner
4ca829e895 use ConstantVector::getSplat in a few places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148929 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 06:02:56 +00:00
Craig Topper
4bb3f34b22 Custom lower phadd and phsub intrinsics to target specific nodes. Remove the patterns that are no longer necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148927 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 05:37:32 +00:00
Chris Lattner
3c2c954e0b reapply r148901 with a crucial fix.
"Introduce a new ConstantVector::getSplat constructor function to 
simplify a really common case."


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148924 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 05:19:54 +00:00
Craig Topper
bce73e0a8c Remove AVX 256-bit unaligned load intrinsics. 128-bit versions had been removed a while ago.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148922 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 04:42:03 +00:00
Akira Hatanaka
4bd73cac6a Mark 64-bit register RA_64 unused too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148918 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 04:19:22 +00:00
Akira Hatanaka
de5a0b65c2 Modify MipsFrameLowering::emitPrologue and emitEpilogue.
- Use MipsAnalyzeImmediate to expand immediates that do not fit in 16-bit.
- Change the types of variables so that they are sufficiently large to handle
  64-bit pointers.
- Emit instructions to set register $28 in a function prologue after
  instructions which store callee-saved registers have been emitted. 
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148917 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 04:12:04 +00:00
Akira Hatanaka
36e91e9599 Modify MipsRegisterInfo::eliminateFrameIndex to use MipsAnalyzeImmediate to
expand offsets that do not fit in the 16-bit immediate field of load and store
instructions. Also change the types of variables so that they are sufficiently
large to handle 64-bit pointers.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148916 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 03:55:10 +00:00
Craig Topper
042883f5da Merge intrinsic pattern and no pattern versions of VCVTSD2SI intruction definitions. Matches non-AVX version of same instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148914 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 03:52:09 +00:00
NAKAMURA Takumi
50da3cb0f8 MipsAnalyzeImmediate.h: Fix to add DataTypes.h for msvc.
inttypes.h is not supplied in msvc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148912 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 03:34:41 +00:00
Nick Lewycky
1486ae626f Fix assert("msg"). Fix unused-variable warnings complaining about VT used only
in asserts.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148910 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 03:20:12 +00:00
NAKAMURA Takumi
e0794d331a Target/Mips: Unbreak CMake build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148909 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 03:15:46 +00:00
Akira Hatanaka
57fa38225c Lower 64-bit immediates using MipsAnalyzeImmediate that has just been added.
Add a test case to show fewer instructions are needed to load an immediate
with the new way of loading immediates.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148908 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 03:01:35 +00:00
Argyrios Kyrtzidis
1ab525e857 Revert r148901 because it crashes llvm tests.
Original log:
    Introduce a new ConstantVector::getSplat constructor function to
    simplify a really common case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148906 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 02:42:41 +00:00
Chris Lattner
82385c9a40 Introduce a new ConstantVector::getSplat constructor function to
simplify a really common case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148901 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 01:53:58 +00:00
Akira Hatanaka
dc81eae9d2 Add class MipsAnalyzeImmediate which comes up with an instruction sequence to
load an immediate. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148900 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 01:43:36 +00:00
Chris Lattner
af7b4fb9be Remove the Type::getNumElements() method, which is only called in 4 places,
did something extremely surprising, and shadowed actually useful 
implementations that had completely different behavior.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148898 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 01:32:59 +00:00
Chris Lattner
0f193b8a68 Use the right method to get the # elements in a CDS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148897 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 01:27:20 +00:00
Jim Grosbach
a57a36abe7 NEON VLD4(all lanes) assembly parsing and encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148884 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 00:01:08 +00:00
Jim Grosbach
6cd6a6824f Tidy up. Rename VLD4DUP patterns for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148883 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 23:47:07 +00:00
Jim Grosbach
5e59f7e15e NEON VLD3(all lanes) assembly parsing and encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148882 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 23:47:04 +00:00
Jakob Stoklund Olesen
d36f5af224 Set correct <def,undef> flags when lowering REG_SEQUENCE.
A REG_SEQUENCE instruction is lowered into a sequence of partial defs:

  %vreg7:ssub_0<def,undef> = COPY %vreg20:ssub_0
  %vreg7:ssub_1<def> = COPY %vreg2
  %vreg7:ssub_2<def> = COPY %vreg2
  %vreg7:ssub_3<def> = COPY %vreg2

The first def needs an <undef> flag to indicate it is the beginning of
the live range, while the other defs are read-modify-write.  Previously,
we depended on LiveIntervalAnalysis to notice and fix the missing
<def,undef>, but that solution was never robust, it was causing problems
with ProcessImplicitDefs and the lowering of chained REG_SEQUENCE
instructions.

This fixes PR11841.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148879 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 23:28:42 +00:00
Jakob Stoklund Olesen
1ce6a36610 Use the standard MachineFunction::print() after SlotIndexes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148878 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 23:28:38 +00:00
Akira Hatanaka
25dae8f4a3 Sign-extend 32-bit integer arguments when they are passed in 64-bit registers,
which is what N32/64 does.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148875 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 23:18:43 +00:00
Akira Hatanaka
08067b26f7 Pass CCState by reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148871 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 22:07:36 +00:00
Akira Hatanaka
e6e4b3a002 Pattern for f32 to i64 conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148869 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 22:05:25 +00:00
Jim Grosbach
c389af94b6 ARM Darwin symbol ref differences w/o subsection-via-symbols.
When not using subsections via symbols, the assembler can resolve
symbol differences (including pcrel references) to non-local
labels at assembly time, not just those in the same atom.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148865 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 21:45:25 +00:00
Devang Patel
3b96e1fe3b Intel Syntax: Extend special hand coded logic, to recognize special instructions, for intel syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148864 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 21:43:36 +00:00
Akira Hatanaka
5387f2e4f3 64-bit sign extension in register instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148862 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 21:41:09 +00:00
Matt Beaumont-Gay
7f64823edb Sink assert-only variables into the asserts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148849 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 19:43:30 +00:00
Kostya Serebryany
0307b9a885 [asan] enable asan only for the functions that have Attribute::AddressSafety
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148846 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 19:34:43 +00:00
Jim Grosbach
88a54de799 NEON VST4(one lane) assembly parsing and encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148836 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 18:53:13 +00:00
Owen Anderson
4f8dc7b17a Widen the instruction encoder that TblGen emits to a 64 bits, which should accomodate every target I can think of offhand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148833 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 18:37:29 +00:00
Jim Grosbach
e983a134e7 NEON VLD4(one lane) assembly parsing and encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148832 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 18:37:25 +00:00
Jakob Stoklund Olesen
10c6fdcd11 Fix old doxygen comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148825 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 18:09:18 +00:00
Jim Grosbach
1ac2060678 NEON Two-operand assembly aliases for VSRA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148821 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 17:55:36 +00:00
Jim Grosbach
5e497d3992 NEON Two-operand assembly aliases for VSLI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148819 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 17:49:15 +00:00
Jim Grosbach
d8ee0cc4e8 NEON Two-operand assembly aliases for VSRI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148818 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 17:46:58 +00:00
Jim Grosbach
78d13e191e NEON add correct predicates for some asm aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148815 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 17:23:29 +00:00
Chris Lattner
bec2d03c4d basic instcombine support for CDS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148806 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 14:31:22 +00:00
Chris Lattner
29cc6cb4d1 C++, CBE, and TLOF support for ConstantDataSequential
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148805 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 14:17:05 +00:00
Chris Lattner
3210060243 Rearrange argument order of ::get methods so that LLVMContext comes first,
add a ConstantDataArray::getString method that corresponds to the (to be
removed) StringRef version of ConstantArray::get, but is dramatically more 
efficient.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148804 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 14:04:40 +00:00
Elena Demikhovsky
28d7e71a30 ZERO_EXTEND operation is optimized for AVX.
v8i16 -> v8i32, v4i32 -> v4i64 - used vpunpck* instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148803 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 13:54:13 +00:00