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1 Commits

Author SHA1 Message Date
Kevin Enderby
7772f9af13 Update the X86 assembler for .intel_syntax to produce an error for invalid base 
registers in memory addresses that do not match the index register. As it does
for .att_syntax.

rdar://15887380


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199948 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-23 22:34:42 +00:00