6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-08-22 10:29:35 +00:00
Code Issues Projects Releases Wiki Activity
96,369 Commits 39 Branches 0 Tags 277 MiB
79e2ed4d83
Commit Graph

2 Commits

Author SHA1 Message Date
Richard Sandiford
856bf59433 [SystemZ] Try to fold shifts into TMxx 
E.g. "SRL %r2, 2; TMLL %r2, 1" => "TMLL %r2, 4".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190672 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-13 09:09:50 +00:00
Richard Sandiford
477168192c [SystemZ] Add support for TMHH, TMHL, TMLH and TMLL 
For now just handles simple comparisons of an ANDed value with zero.
The CC value provides enough information to do any comparison for a
2-bit mask, and some nonzero comparisons with more populated masks,
but that's all future work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189469 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-28 10:31:43 +00:00