Commit Graph

14 Commits

Author SHA1 Message Date
Chris Lattner
c8c377d111 Move "register flags" definition the type of registers to be fully fledged
value types


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7377 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-29 05:14:16 +00:00
Misha Brukman
8829dcd15b It's "necessary"...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5848 91177308-0d34-0410-b5e6-96231b3b80d8
2003-04-22 20:20:11 +00:00
Chris Lattner
a849056a37 rename FP -> fp*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5232 91177308-0d34-0410-b5e6-96231b3b80d8
2003-01-13 00:50:46 +00:00
Chris Lattner
ba4ef26245 Initial support for FP registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5149 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-25 05:08:03 +00:00
Chris Lattner
27177cb1c1 Finish implementation of alias list impl
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5083 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-16 19:31:48 +00:00
Chris Lattner
92aec04cd6 Try #2 to get alias set stuff to work
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5077 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-16 16:14:51 +00:00
Chris Lattner
1894dd6ca9 Add comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5076 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-16 15:57:44 +00:00
Chris Lattner
1a49517a2c Add information about register file aliasing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5073 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-16 15:54:59 +00:00
Misha Brukman
602b9ff595 Thanks to the R8, R16, and R32 macros, I can now deal with registers that
belong to different register classes easier.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4773 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-20 00:47:40 +00:00
Chris Lattner
e9b309ad13 Wow, I'm incapable of the simplest things today...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4732 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 23:05:21 +00:00
Chris Lattner
fb02a8b11f Rename registers to follow the intel style of all caps
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4731 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 23:03:46 +00:00
Brian Gaeke
6559bb96a9 include/llvm/CodeGen/MachineInstrBuilder.h: Add addClobber() inline
convenience method.  Fix typo in comment.
lib/Target/X86/InstSelectSimple.cpp: Explicitly specify some implicit uses.
 Use MOVZX/MOVSX instead of MOV instructions with sign extend instructions.
 Take out LEAVE instructions.
 32-bit IDIV and DIV use CDQ, not CWQ (CWQ is a typo).
 Fix typo in comment and remove some FIXME comments.
lib/Target/X86/Printer.cpp: Include X86InstrInfo.h and llvm/Function.h.
 Add some simple code to Printer::runOnFunction to iterate over
  MachineBasicBlocks and call X86InstrInfo::print().
lib/Target/X86/X86InstrInfo.def: Make some more instructions with
 implicit defs "Void".  Add more sign/zero extending "move" insns
 (movsx, movzx).
lib/Target/X86/X86RegisterInfo.def: Add EFLAGS as a register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4707 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-14 22:32:30 +00:00
Misha Brukman
6ee9b5a57d Fixed spelling and grammar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4353 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-28 20:01:52 +00:00
Chris Lattner
726140821f Initial checkin of X86 backend.
We can instruction select exactly one instruction 'ret void'.  Wow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4284 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-25 22:55:53 +00:00