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7aef62ff8c
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11121 Commits

Author SHA1 Message Date
Kevin Enderby
7aef62ff8c Added a handful of x86-32 instructions that were missing so that llvm-mc would 
be more complete.  These are only expected to be used by llvm-mc with assembly
source so there is no pattern, [], in the .td files.  Most are being added to
X86InstrInfo.td as Chris suggested and only comments about register uses are
added.  Suggestions welcome on the .td changes as I'm not sure on every detail
of the x86 records.  More missing instructions will be coming.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116716 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 17:04:36 +00:00
Rafael Espindola
9edab3a9e1 Produce a R_386_PLT32 when needed. Moved the default cases of switches to the 
start for consistency.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116715 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 16:58:03 +00:00
Rafael Espindola
c97f80efc8 Handle GOTOFF correctly on i386. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116711 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 16:38:04 +00:00
Kalle Raiskila
940e7965f1 Improve lowering of sext to i128 on SPU. 
The old algorithm inserted a 'rotqmbyi' instruction which was
both redundant and wrong - it made shufb select bytes from the
wrong end of the input quad.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116701 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 09:34:19 +00:00
Rafael Espindola
f230df9af4 Add a MCObjectFormat class so that code common to all targets that use a 
single object format can be shared.

This also adds support for

mov zed+(bar-foo), %eax

on ELF and COFF targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116675 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-16 18:23:53 +00:00
Benjamin Kramer
d30dcfe331 Unbreak test on non-COFF targets. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116669 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-16 11:27:13 +00:00
Michael J. Spencer
4cee2890a6 MC-COFF: Add support for default-null weak externals. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116666 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-16 08:25:57 +00:00
Michael J. Spencer
84ac4d5a2a X86-Windows: Emit an undefined global __fltused symbol when targeting Windows 
if any floating point arguments are passed to an external function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116665 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-16 08:25:41 +00:00
Owen Anderson
6549121c66 Generalize MemCpyOpt's handling of call slot forwarding to function properly when the call slot 
forwarding is implemented with a load/store pair rather than a memcpy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116637 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 22:52:12 +00:00
Mikhail Glushenkov
900152bf88 llvmc: Add a test for the -c flag. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116611 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 19:30:49 +00:00
Jim Grosbach
8abe32af38 ARM mode encoding information for UBFX and SBFX instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116588 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 17:15:16 +00:00
Jakob Stoklund Olesen
c279c9079b FileCheckize 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116581 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 16:06:42 +00:00
Rafael Espindola
5df0b65e8f Refactor code a bit and avoid creating unnecessary entries in the string 
map.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116579 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 15:39:06 +00:00
Bob Wilson
cfbece50f6 ARM instructions that are both predicated and set the condition codes 
have been printed with the "S" modifier after the predicate.  With ARM's
unified syntax, they are supposed to go in the other order.  We fixed this
for Thumb when we switched to unified syntax but missed changing it for
ARM.  Apparently we don't generate these instructions often because no one
noticed until now.  Thanks to Bill Wendling for the testcase!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116563 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 03:23:44 +00:00
Jim Grosbach
53e7dcbd47 Simplify test file a bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116540 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 23:32:44 +00:00
Jim Grosbach
8faff9c759 Add testcase for RRX and ASRS (which effectively tests MOVs, since those 
are just forms of that instruction).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116538 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 23:29:18 +00:00
Jim Grosbach
7032f922b1 Refactor the MOVsr[al]_flag and RRX pseudo-instructions to really be pseudos 
and let the ARMExpandPseudoInsts pass fix them up into the real (MOVs)
instruction form.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116534 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 22:57:13 +00:00
Jim Grosbach
792e9796b3 Tweak the ARM backend to use the RRX mnemonic instead of the 'mov a, b, rrx' 
pseudonym.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116512 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 20:43:44 +00:00
Jim Grosbach
1de588df69 MOVi16 and MOVT ARM mode encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116498 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 18:54:27 +00:00
Rafael Espindola
a0949b50dc Remove some code duplication. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116484 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 16:34:44 +00:00
Mikhail Glushenkov
263cfecd4f Comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116476 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 13:43:20 +00:00
Bill Wendling
bbbdcd453d Add support for vmov.f64/.f32 encoding. There's a bit of a hack going on 
here. The f32 in FCONSTS is handled as a double instead of a float in the
code. So the encoding of the immediate into the instruction isn't exactly in
line with the documentation in that regard. But given that we know it's handled
as a double, it doesn't cause any harm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116471 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 02:33:26 +00:00
Bill Wendling
946a2740a5 Add encoding for 'fmstat'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116466 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 01:19:34 +00:00
Bill Wendling
88cf038436 - Add encodings for multiply add/subtract instructions in all their glory. 
- Add missing patterns for some multiply add/subtract instructions.
- Add encodings for VMRS and VMSR.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116464 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 01:02:08 +00:00
Chris Lattner
a5bbde8efd fix a bug I introduced, no idea how this didn't repro right. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116462 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 00:30:00 +00:00
Chris Lattner
15ea094474 hack to unbreak buildbots 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116461 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 00:26:10 +00:00
Chris Lattner
eafc5cb80d add uadd_ov/usub_ov to apint, consolidate constant folding 
logic to use the new APInt methods.  Among other things this
implements rdar://8501501 - llvm.smul.with.overflow.i32 should constant fold

which comes from "clang -ftrapv", originally brought to my attention from PR8221.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116457 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 00:05:07 +00:00
Jim Grosbach
b3af5de2d9 Refactor the ARM 'setend' instruction pattern. Use a single instruction pattern 
and handle the operand explicitly. Flesh out encoding information. Add an
explicit disassembler testcase for the instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116432 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 21:00:04 +00:00
Bill Wendling
67a704de03 Add MC encodings for VCVT* instrunctions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116431 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 20:58:46 +00:00
Jim Grosbach
b35ad41fef Add ARM mode encoding for [SU]XT[BH] and [SU]XTA[BH] instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116421 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 19:56:10 +00:00
Jim Grosbach
24989ecc70 Add ARM mode operand encoding information for ADDE/SUBE instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116412 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 18:00:52 +00:00
Rafael Espindola
6d8628061b Fix another case where we were preferring instructions with large 
immediates instead of 8 bits ones.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116410 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 17:14:25 +00:00
Rafael Espindola
dba81cf40e Fix PR8365 by adding a more specialized Pat that checks if an 'and' with 
8 bit constants can be used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116403 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 13:31:20 +00:00
Bill Wendling
6932643a37 Add encodings for VNEG and VSQRT. Also add encodings for VMOV, but not a test 
just yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116386 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 01:17:33 +00:00
Bill Wendling
54908dd72b Add encodings for VCVT instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116385 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 00:56:35 +00:00
Jim Grosbach
89c898f8af Add ARM encoding information for comparisons, forced-cc-out arithmetics, and 
arithmetic-with-carry-in instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116384 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 00:50:27 +00:00
Bill Wendling
1fc6d8837f Add VCMPZ and VABS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116383 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 00:38:07 +00:00
Bill Wendling
cd77686254 Refactor VCMP instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116379 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 00:04:29 +00:00
Eric Christopher
8f9145b0eb FileCheckize this in a hope to quiet a valgrind warning on grep. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116376 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-12 23:47:58 +00:00
Bill Wendling
5a1fd8cf68 Add encodings for VNMUL[SD]. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116375 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-12 23:47:37 +00:00
Bill Wendling
caa3d467ab Add encodings for VDIV and VMUL. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116370 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-12 23:22:27 +00:00
Jim Grosbach
c14b80f6d3 Be nitpicky and line up the comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116365 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-12 23:14:03 +00:00
Bill Wendling
dd3bc112e6 Add encoding for VSUB and VCMP. 
Fear not! I'm going to try a refactoring right now. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116359 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-12 22:55:35 +00:00
Bill Wendling
6e8bf26342 Don't need to specify calling convention. Add 'readnone' to functions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116354 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-12 22:24:10 +00:00
Bill Wendling
174777bb2b Encoding for VADDD. Plus a test for the VFP instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116348 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-12 22:08:41 +00:00
Jim Grosbach
0de6ab3c43 Add encoding information for the remainder of the generic arithmetic 
ARM instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116313 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-12 17:11:26 +00:00
Dan Gohman
c015723131 Add a simple testcase for tbaa. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116272 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-11 23:54:13 +00:00
Jim Grosbach
42fac8ee3b MC machine encoding for simple aritmetic instructions that use a shifted 
register operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116259 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-11 23:16:21 +00:00
Andrew Trick
0a434dbb91 PR8297 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116223 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-11 21:08:42 +00:00
Jakob Stoklund Olesen
4f9af2ef65 PowerPC varargs functions store live-in registers on the stack. Make sure we use 
virtual registers for those stores since RegAllocFast requires that each live
physreg only be used once.

This fixes PR8357.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116222 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-11 20:43:09 +00:00