Commit Graph

120075 Commits

Author SHA1 Message Date
Matt Arsenault
fd8928ded9 Fix assert when inlining a constantexpr addrspacecast
The pointer size of the addrspacecasted pointer might not have matched,
so this would have hit an assert in accumulateConstantOffset.

I think this was here to allow constant folding of a load of an
addrspacecasted constant. Accumulating the offset through the
addrspacecast doesn't make much sense, so something else is necessary
to allow folding the load through this cast.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243300 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 18:31:03 +00:00
Diego Novillo
55557ce3f8 Fix ODR violation. NFC.
There is an ODR conflict between lib/ExecutionEngine/ExecutionEngineBindings.cpp
and lib/Target/TargetMachineC.cpp. The inline definitions should simply
be marked static (thanks dblaikie for the hint).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243298 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 18:27:23 +00:00
JF Bastien
6a829ed9d4 Fix llvm-config to emit the linker flag for the combined shared object built by autoconfig/make instead of the individual components.
Summary:
When LLVM is configured to build shared libraries, CMake builds each component as it's own shared object, while autoconfig/make builds them statically and then links them all together to create a single shared object. This change adds compile time config flags to `llvm-config` so it can know whether LLVM's components are separated or not and act accordingly.

This fixes `llvm-config` instead of fixing the makefiles to behave like CMake because, AIUI, LLVM's autoconfig/make build system is on the way out anyway.

This change only affects `llvm-config` from builds that use autoconfig/make.

Reviewers: jfb

Subscribers: echristo, dschuff, llvm-commits

Differential Revision: http://reviews.llvm.org/D11392

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243297 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 18:26:30 +00:00
Marek Olsak
dbd8d4f056 AMDGPU: don't match vgpr loads for constant loads
Author: Dave Airlie <airlied@redhat.com>

In order to implement indirect sampler loads, we don't
want to match on a VGPR load but an SGPR one for constants,
as we cannot feed VGPRs to the sampler only SGPRs.

this should be applicable for llvm 3.7 as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243294 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 18:16:08 +00:00
Sanjay Patel
5834764c65 move combineRepeatedFPDivisors logic into a helper function; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243293 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 17:58:49 +00:00
Alex Lorenz
6c304ebd8a Reset the virtual registers in liveins when clearing the virtual registers.
This commit zeroes out the virtual register references in the machine
function's liveins in the class 'MachineRegisterInfo' when the virtual
register definitions are cleared.

Reviewers: Matthias Braun


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243290 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 17:51:59 +00:00
Alex Lorenz
a5da4f1f8d MIR Serialization: Serialize the machine function's liveins.
Reviewers: Duncan P. N. Exon Smith


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243288 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 17:42:45 +00:00
Sanjay Patel
b7abbca1dd fix typo and spacing; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243287 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 17:39:20 +00:00
Davide Italiano
c11299b4a7 [TableGen] Emit the correct error message.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243284 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 17:22:19 +00:00
Pete Cooper
80ec0f8f15 Revert "Add const to a bunch of Type* in DataLayout. NFC."
This reverts commit r243135.

Feedback from Craig Topper and David Blaikie was that we don't put const on Type as it has no mutable state.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243283 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 17:15:28 +00:00
Pete Cooper
5253b18afb Revert "Add const to some Type* parameters which didn't need to be mutable. NFC."
This reverts commit r243146.

Feedback from Craig Topper and David Blaikie was that we don't put const on Type as it has no mutable state.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243282 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 17:15:24 +00:00
Silviu Baranga
aee16c42dc The tests added in r243270 require asserts to be enabled
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243274 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 15:22:49 +00:00
Silviu Baranga
cff701eeb9 Fix the tests added in r243270. Use 2>&1 instead of |&
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243273 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 15:08:55 +00:00
Bruno Cardoso Lopes
4abd22ba6b [PeepholeOptimizer] Look through PHIs to find additional register sources
Reapply r242295 with fixes in the implementation.

- Teaches the ValueTracker in the PeepholeOptimizer to look through PHI
instructions.
- Add findNextSourceAndRewritePHI method to lookup into multiple sources
returnted by the ValueTracker and rewrite PHIs with new sources.

With these changes we can find more register sources and rewrite more
copies to allow coaslescing of bitcast instructions. Hence, we eliminate
unnecessary VR64 <-> GR64 copies in x86, but it could be extended to
other archs by marking "isBitcast" on target specific instructions. The
x86 example follows:

A:
  psllq %mm1, %mm0
  movd  %mm0, %r9
  jmp C

B:
  por %mm1, %mm0
  movd  %mm0, %r9
  jmp C

C:
  movd  %r9, %mm0
  pshufw  $238, %mm0, %mm0

Becomes:

A:
  psllq %mm1, %mm0
  jmp C

B:
  por %mm1, %mm0
  jmp C

C:
  pshufw  $238, %mm0, %mm0

Differential Revision: http://reviews.llvm.org/D11197
rdar://problem/20404526

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243271 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 14:39:46 +00:00
Silviu Baranga
541d079947 [ARM/AArch64] Fix cost model for interleaved accesses
Summary:
Fix the cost of interleaved accesses for ARM/AArch64.
We were calling getTypeAllocSize and using it to check
the number of bits, when we should have called
getTypeAllocSizeInBits instead.

This would pottentially cause the vectorizer to
generate loads/stores and shuffles which cannot
be matched with an interleaved access instruction.

No performance changes are expected for now since
matching/generating interleaved accesses is still
disabled by default.

Reviewers: rengolin

Subscribers: aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D11524

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243270 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 14:39:34 +00:00
Simon Pilgrim
7b1102220b [X86] Reordered lowerVectorShuffleAsBitMask before lowerVectorShuffleAsBlend. NFCI.
Allows us to show diffs for D11518 more clearly

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243264 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 12:37:19 +00:00
Marek Olsak
bf26b3fcae AMDGPU/SI: Fix the V_FRACT_F64 SI bug workaround
This is a candidate for 3.7.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243263 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 11:37:42 +00:00
NAKAMURA Takumi
845a30e5b8 LoopAccessAnalysis.cpp: Tweak r243239 to avoid side effects. It caused different emissions between gcc and clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243258 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 01:35:30 +00:00
Sean Silva
508c047e71 Avoid using uncommon acronym "MSROM".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243256 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-27 00:46:59 +00:00
Jingyue Wu
580991b5c9 Roll forward r243250
r243250 appeared to break clang/test/Analysis/dead-store.c on one of the build
slaves, but I couldn't reproduce this failure locally. Probably a false
positive as I saw this test was broken by r243246 or r243247 too but passed
later without people fixing anything.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243253 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-26 19:10:03 +00:00
Jingyue Wu
e48b1257f1 Revert r243250
breaks tests


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243251 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-26 18:30:13 +00:00
Jingyue Wu
9f141640b5 [TTI/CostModel] improve TTI::getGEPCost and use it in CostModel::getInstructionCost
Summary:
This patch updates TargetTransformInfoImplCRTPBase::getGEPCost to consider
addressing modes. It now returns TCC_Free when the GEP can be completely folded
to an addresing mode.

I started this patch as I refactored SLSR. Function isGEPFoldable looks common
and is indeed used by some WIP of mine. So I extracted that logic to getGEPCost.

Furthermore, I noticed getGEPCost wasn't directly tested anywhere. The best
testing bed seems CostModel, but its getInstructionCost method invokes
getAddressComputationCost for GEPs which provides very coarse estimation. So
this patch also makes getInstructionCost call the updated getGEPCost for GEPs.
This change inevitably breaks some tests because the cost model changes, but
nothing looks seriously wrong -- if we believe the new cost model is the right
way to go, these tests should be updated.

This patch is not perfect yet -- the comments in some tests need to be updated.
I want to know whether this is a right approach before fixing those details.

Reviewers: chandlerc, hfinkel

Subscribers: aschwaighofer, llvm-commits, aemerson

Differential Revision: http://reviews.llvm.org/D9819

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243250 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-26 17:28:13 +00:00
Simon Pilgrim
47e6b7c3c7 [X86][SSE] Refreshed vector bit count tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243249 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-26 17:02:25 +00:00
Simon Pilgrim
04269801f1 [X86][AVX2] Refreshed avx2 conversion tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243248 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-26 17:01:16 +00:00
Tobias Grosser
6db2ad6004 bugpoint: make the number of trim iterations a compile-time constant
Around 10 year ago Chris limited this code to a single iteration by just
dropping a break into the loop body. We now make the number of trim iterations
a compile time constant to be able to play with it and see if this can
improve the bugpoint results. We currently use with '3' still a small and
conservative value, but this can be adjusted in the future, if needed.

I tried to look for a trivial test case, but did not succeed yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243247 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-26 15:18:45 +00:00
Igor Breger
6df163bcdf Implemented encoding and intrinsics of the following instructions
vunpckhps/pd, vunpcklps/pd, 
  vpunpcklbw, vpunpckhbw, vpunpcklwd, vpunpckhwd, vpunpckldq, vpunpckhdq, vpunpcklqdq, vpunpckhqdq
Added tests for intrinsics and encoding.

Differential Revision: http://reviews.llvm.org/D11509

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243246 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-26 14:41:44 +00:00
Tobias Grosser
6eda2f880c Fix typo in comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243244 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-26 11:37:05 +00:00
Davide Italiano
5e7aab0de2 [llvm-dwarfump] Don't rely on global state, part 3.
Some tools used to rely on a global static variable to keep track of the 
return value for main(). I changed llvm-cxxdump to use exit(1)
and Rafael shortly after did the same with llvm-readobj. This is
(yet) another step towards the goal.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243240 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-26 05:35:59 +00:00
Adam Nemet
09fa5a537e [LAA] Begin moving the logic of generating checks out of addRuntimeCheck
Summary:
The goal is to start moving us closer to the model where
RuntimePointerChecking will compute and store the checks.  Then a client
can filter the check according to its requirements and then use the
filtered list of checks with addRuntimeCheck.

Before the patch, this is all done in addRuntimeCheck.  So the patch
starts to split up addRuntimeCheck while providing the old API under
what's more or less a wrapper now.

The new underlying addRuntimeCheck takes a collection of checks now,
expands the code for the bounds then generates the code for the checks.

I am not completely happy with making expandBounds static because now it
needs so many explicit arguments but I don't want to make the type
PointerBounds part of LAI.  This should get fixed when addRuntimeCheck
is moved to LoopVersioning where it really belongs, IMO.

Audited the assembly diff of the testsuite (including externals).  There
is a tiny bit of assembly churn that is due to the different order the
code for the bounds is expanded now
(MultiSource/Benchmarks/Prolangs-C/bison/conflicts.s and with LoopDist
on 456.hmmer/fast_algorithms.s).

Reviewers: hfinkel

Subscribers: klimek, llvm-commits

Differential Revision: http://reviews.llvm.org/D11205

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243239 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-26 05:32:14 +00:00
Simon Pilgrim
ddcbf4ce91 [InstCombine][SSE4A] Standardized references to Length/Width and Index/Start to match AMD docs. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243226 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-25 20:41:00 +00:00
Simon Pilgrim
9e297691a4 [InstCombine] Split off SSE4a tests.
These aren't vector demanded bits tests. More tests to follow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243223 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-25 17:14:01 +00:00
Simon Pilgrim
e6dad29b16 [X86][SSE] Added additional vector sign/zero load extension tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243216 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-25 14:07:20 +00:00
Simon Pilgrim
af824151a1 [X86][SSE] Added additional vector sign/zero extension tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243212 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-25 11:17:35 +00:00
Chen Li
7b0238cdc1 [LoopUnswitch] Improve loop unswitch pass to find trivial unswitch conditions more effectively
Summary:
This patch improves trivial loop unswitch. 

The current trivial loop unswitch only checks if loop header's terminator contains a trivial unswitch condition. But if the loop header only has one reachable successor (due to intentionally or unintentionally missed code simplification), we should consider the successor as part of the loop header. Therefore, instead of stopping at loop header's terminator, we should keep traversing its successors within loop until reach a *real* conditional branch or switch (whose condition can not be constant folded). This change will enable a single -loop-unswitch pass to unswitch multiple trivial conditions (unswitch one trivial condition could open opportunity to unswitch another one in the same loop), while the old implementation can unswitch only one per pass. 

Reviewers: reames, broune

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11481

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243203 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-25 03:21:06 +00:00
Juergen Ributzka
e928ceb9e6 [AArch64][FastISel] Always use an AND instruction when truncating to non-legal types.
When truncating to non-legal types (such as i16, i8 and i1) always use an AND
instruction to mask out the upper bits. This was only done when the source type
was an i64, but not when the source type was an i32.

This commit fixes this and adds the missing i32 truncate tests.

This fixes rdar://problem/21990703.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243198 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-25 02:16:53 +00:00
Eric Christopher
e05397b4ae Fix PPCMaterializeInt to check the size of the integer based on the
extension property we're requesting - zero or sign extended.

This fixes cases where we want to return a zero extended 32-bit -1
and not be sign extended for the entire register. Also updated the
already out of date comment with the current behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243192 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-25 00:48:08 +00:00
Eric Christopher
ed600fe8b7 PPCMaterializeInt should only take a ConstantInt so represent this in the prototype
and fix up all uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243191 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-25 00:48:06 +00:00
Akira Hatanaka
e934b449d4 [AArch64] Define subtarget feature "reserve-x18", which is used to decide
whether register x18 should be reserved.

This change is needed because we cannot use a backend option to set
cl::opt "aarch64-reserve-x18" when doing LTO.

Out-of-tree projects currently using cl::opt option "-aarch64-reserve-x18"
to reserve x18 should make changes to add subtarget feature "reserve-x18"
to the IR.

rdar://problem/21529937

Differential Revision: http://reviews.llvm.org/D11463


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243186 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-25 00:18:31 +00:00
Duncan P. N. Exon Smith
cbfbb3ee4c DI/Verifier: Fix argument bitrot in DILocalVariable
Add a verifier check that `DILocalVariable`s of tag
`DW_TAG_arg_variable` always have a non-zero 'arg:' field, and those of
tag `DW_TAG_auto_variable` always have a zero 'arg:' field.  These are
the only configurations that are properly understood by the backend.

(Also, fix the bad examples in LangRef and test/Assembler, and fix the
bug in Kaleidoscope Ch8.)

A large number of testcases seem to have bitrotted their way forward
from some ancient version of the debug info hierarchy that didn't have
`arg:` parameters.  If you have out-of-tree testcases that start failing
in the verifier and you don't care enough to get the `arg:` right, you
may have some luck just calling:

    sed -e 's/, arg: 0/, arg: 1/'

or some such, but I hand-updated the ones in tree.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243183 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-24 23:59:25 +00:00
Alex Lorenz
3a8b87d9ce MIR Serialization: Serialize MachineFrameInfo's callee saved information.
This commit serializes the callee saved information from the class
'MachineFrameInfo'. This commit extends the YAML mappings for the fixed and
the ordinary stack objects and adds an optional 'callee-saved-register'
attribute. This attribute is used to serialize the callee save information.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243173 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-24 22:22:50 +00:00
Lawrence Hu
5136ca2c6d Handle loop with negtive induction variable increment
This patch extend LoopReroll pass to hand the loops which
is similar to the following:

      while (len > 1) {
            sum4 += buf[len];
            sum4 += buf[len-1];
            len -= 2;
        }

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243171 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-24 22:01:49 +00:00
Pete Cooper
b0fd31a910 Remove unnecessary null check. NFC.
Since both places which set this variable do so with dyn_cast, and not
dyn_cast_or_null, its impossible to get a nullptr here, so we can remove
the check.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243167 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-24 21:38:01 +00:00
Pete Cooper
9f2f1650c4 Use make_range(rbegin(), rend()) to allow foreach loops. NFC.
Instead of the pattern

for (auto I = x.rbegin(), E = x.end(); I != E; ++I)

we can use make_range to construct the reverse range and iterate using
that instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243163 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-24 21:13:43 +00:00
Duncan P. N. Exon Smith
d232d63fa2 DI: Fix unit tests after r243160
These always empty fields are gone, so don't test that they're empty.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243162 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-24 21:11:06 +00:00
Duncan P. N. Exon Smith
e5f2fce18a DI: Remove unnecessary DICompositeTypeBase
Remove unnecessary and confusing common base class for `DICompositeType`
and `DISubroutineType`.

While at a high-level `DISubroutineType` is a sort of composite of other
types, it has no shared code paths, and its fields are completely
disjoint.  This relationship was left over from the old debug info
hierarchy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243160 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-24 20:56:36 +00:00
Duncan P. N. Exon Smith
24b6acf971 DI: Simplify DebugInfoFinder::processType(), NFC
Handle `DISubroutineType` up-front rather than as part of a branch for
`DICompositeTypeBase`.  The only shared code path was looking through
the base type, but `DISubroutineType` can never have a base type.

This also removes the last use of `DICompositeTypeBase`, since we can
strengthen the cast to `DICompositeType`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243159 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-24 20:56:10 +00:00
Duncan P. N. Exon Smith
0567cb7e1a DI: Remove dead code: getDICompositeType()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243158 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-24 20:46:46 +00:00
Duncan P. N. Exon Smith
88c307a010 AsmPrinter: Use DICompositeType in updateAcceleratorTables(), NFC
`DISubroutineType` is impossible at this `dyn_cast` site, since we're
only dealing with named types and `DISubroutineType` cannot be named.
Strengthen the `dyn_cast` to `DICompositeType`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243157 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-24 20:45:26 +00:00
Alex Lorenz
dfe0e536ee MIR Serialization: Serialize the simple virtual register allocation hints.
This commit serializes the virtual register allocations hints of type 0.
These hints specify the preferred physical registers for allocations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243156 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-24 20:35:40 +00:00
Duncan P. N. Exon Smith
7b464ae8b9 DI: Remove DIDerivedTypeBase
Remove an unnecessary (and confusing) common subclass for
`DIDerivedType` and `DICompositeType`.  These classes aren't really
related, and even in the old debug info hierarchy, there was a
long-standing FIXME to separate them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243152 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-24 20:16:36 +00:00