llvm-6502

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Commit Graph

Author	SHA1	Message	Date
Evan Cheng	3ef1c8759a	Teach if-converter to be more careful with predicating instructions that would take multiple cycles to decode. For the current if-converter clients (actually only ARM), the instructions that are predicated on false are not nops. They would still take machine cycles to decode. Micro-coded instructions such as LDM / STM can potentially take multiple cycles to decode. If-converter should take treat them as non-micro-coded simple instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113570 91177308-0d34-0410-b5e6-96231b3b80d8	2010-09-10 01:29:16 +00:00
Evan Cheng	46df4eb46e	Make post-ra scheduling, anti-dep breaking, and register scavenger (conservatively) aware of predicated instructions. This enables ARM to move if-conversion before post-ra scheduler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106091 91177308-0d34-0410-b5e6-96231b3b80d8	2010-06-16 07:35:02 +00:00
Evan Cheng	774bc882fd	- Do away with SimpleHazardRecognizer.h. It's not used and offers little value. - Rename ExactHazardRecognizer to PostRAHazardRecognizer and move its header to include to allow targets to extend it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105959 91177308-0d34-0410-b5e6-96231b3b80d8	2010-06-14 21:06:53 +00:00

Author

SHA1

Message

Date

Evan Cheng

3ef1c8759a

Teach if-converter to be more careful with predicating instructions that would

take multiple cycles to decode.
For the current if-converter clients (actually only ARM), the instructions that
are predicated on false are not nops. They would still take machine cycles to
decode. Micro-coded instructions such as LDM / STM can potentially take multiple
cycles to decode. If-converter should take treat them as non-micro-coded
simple instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113570 91177308-0d34-0410-b5e6-96231b3b80d8

2010-09-10 01:29:16 +00:00

Evan Cheng

46df4eb46e

Make post-ra scheduling, anti-dep breaking, and register scavenger (conservatively) aware of predicated instructions. This enables ARM to move if-conversion before post-ra scheduler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106091 91177308-0d34-0410-b5e6-96231b3b80d8

2010-06-16 07:35:02 +00:00

Evan Cheng

774bc882fd

- Do away with SimpleHazardRecognizer.h. It's not used and offers little value.

- Rename ExactHazardRecognizer to PostRAHazardRecognizer and move its header to include to allow targets to extend it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105959 91177308-0d34-0410-b5e6-96231b3b80d8

2010-06-14 21:06:53 +00:00

3 Commits