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4 Commits

Author SHA1 Message Date
Tim Northover
ebde5a5e49 ARM64: use hex immediates for movz/movk instructions 
Since these are mostly used in "lsl #16", "lsl #32", "lsl #48" combinations to
piece together an immediate in 16-bit chunks, hex is probably the most
appropriate format.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207635 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-30 11:19:40 +00:00
Tim Northover
8b36f98fd5 AArch64/ARM64: make use of ANDS and BICS instructions for comparisons. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206888 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-22 12:45:42 +00:00
Quentin Colombet
49ad5d5dd5 [ARM64] Set default CPU to generic instead of cyclone. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206313 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-15 19:08:46 +00:00
Tim Northover
7b837d8c75 ARM64: initial backend import 
This adds a second implementation of the AArch64 architecture to LLVM,
accessible in parallel via the "arm64" triple. The plan over the
coming weeks & months is to merge the two into a single backend,
during which time thorough code review should naturally occur.

Everything will be easier with the target in-tree though, hence this
commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-29 10:18:08 +00:00