Commit Graph

14 Commits

Author SHA1 Message Date
John Criswell
856ba76200 Added LLVM copyright header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9321 91177308-0d34-0410-b5e6-96231b3b80d8
2003-10-21 15:17:13 +00:00
Chris Lattner
43a5ff8d40 Emit x86 instructions for: A = B op C, where A and B are 16-bit registers,
C is a constant which can be sign-extended from 8 bits without value loss,
and op is one of: add, sub, imul, and, or, xor.

This allows the JIT to emit the one byte version of the constant instead of
the two or 4 byte version.  Because these instructions are very common, this
can save a LOT of code space.  For example, I sampled two benchmarks, 176.gcc
and 254.gap.

BM        Old     New    Reduction
176.gcc 2673621 2548962  4.89%
254.gap  498261  475104  4.87%

Note that while the percentage is not spectacular, this did eliminate
124.6 _KILOBYTES_ of codespace from gcc.  Not bad.

Note that this doesn't effect the llc version at all, because the assembler
already does this optimization.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9284 91177308-0d34-0410-b5e6-96231b3b80d8
2003-10-20 05:53:31 +00:00
Chris Lattner
c01d1232fe * Rename X86::IMULr16 -> X86::IMULrr16
* Implement R1 = R2 * C where R1 and R2 are 32 or 16 bits. This avoids an
  extra copy into a register, reducing register pressure.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9278 91177308-0d34-0410-b5e6-96231b3b80d8
2003-10-20 03:42:58 +00:00
Chris Lattner
f634a103ee Add some new instructions. Wheee
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9266 91177308-0d34-0410-b5e6-96231b3b80d8
2003-10-19 19:25:35 +00:00
Chris Lattner
51970b2734 Add support for unconditional branches and for emitting JE instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7872 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-15 04:50:49 +00:00
Chris Lattner
00b40943ab Add basic support for 16 and 32 bit function arguments!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7755 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-11 21:30:00 +00:00
Chris Lattner
e7e33c0543 Add (ret int) expander so that we can at least write testcases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7730 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-11 15:48:00 +00:00
Chris Lattner
b84fe1c636 Add patterns for multiply, and, or, and xor
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7725 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-11 15:23:25 +00:00
Chris Lattner
d87b59c866 add a pattern for RET, immediates no longer need to be explicitly typed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7635 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-06 15:31:35 +00:00
Chris Lattner
02beda1221 This is the real fix for the previous register allocator problem.
Physical registers should not float around.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7587 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-05 00:48:47 +00:00
Chris Lattner
0bfd186db0 Add patterns for (mov R, R) (mov R, I) and subtracts. The moves are to enable
testing, the subtracts are because I was in the neighborhood.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7581 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-04 21:18:19 +00:00
Chris Lattner
c34921dc6a Change comments into something that TableGen can read!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7580 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-04 21:08:29 +00:00
Chris Lattner
c8f4587efd transition to using let instead of set
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7564 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-04 04:59:56 +00:00
Chris Lattner
1cca5e3a29 Add new TableGen instruction definitions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7537 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-03 21:54:21 +00:00