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Author SHA1 Message Date
Bill Wendling
b618ea5ff9 When lowering the 'resume' instruction, look to see if we can eliminate the 
'insertvalue' instructions that recreate the structure returned by the
'landingpad' instruction. Because the 'insertvalue' instruction isn't supported
by FastISel, this can save a bit of time during -O0 compilation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148520 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-20 00:53:28 +00:00
Eli Friedman
9a2478ac1a Support MSVC x86-32 sret convention. PR11688. Patch by Joe Groff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148513 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-20 00:05:46 +00:00
Chad Rosier
f46fbade8a Fix typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148497 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-19 21:50:08 +00:00
Benjamin Kramer
e545ee20f1 Silence warnings about mixing enums. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148495 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-19 21:11:13 +00:00
Owen Anderson
27ff6b5e2b Add a dump() implementation for sub-instruction MCOperands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148493 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-19 19:32:20 +00:00
Owen Anderson
7b672fe03b Add a new form of MCOperand, for representing sub-instructions. This is intended for supporting bundles through the MC layer, rather than lowering them pre-MC as we currently do for Thumb2 IT blocks. Since these sub-instruction operands hold pointers to the sub-instructions, it is the responsibility of the target's AsmPrinter to provide storage for them for the duration of the EmitInstruction() call. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148492 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-19 19:24:37 +00:00
Dan Gohman
0cdece4389 Set the "tail" flag on pattern-matched objc_storeStrong calls. 
rdar://10531041.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148490 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-19 19:14:36 +00:00
Devang Patel
a951f77ca3 Post process 'and', 'sub' instructions and select better encoding, if available. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148489 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-19 18:40:55 +00:00
Nick Lewycky
f460bf8cd8 Actually, this code handles wrapped sets just fine. Noticed by inspection. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148487 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-19 18:19:42 +00:00
Devang Patel
e60540f380 Intel syntax: There is no need to create unary expr for simple negative displacement. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148486 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-19 18:15:51 +00:00
Devang Patel
ac0f048602 Post process 'xor', 'or' and 'cmp' instructions and select better encoding, if available. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148485 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-19 17:53:25 +00:00
Evgeniy Stepanov
73dd8bbce3 Emit ARM EHABI unwinding instructions for 3 more Thumb instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148473 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-19 12:53:06 +00:00
Craig Topper
40385c8104 Folding table additions and fixes for AVX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148467 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-19 08:50:38 +00:00
Craig Topper
1a7700a3fa Merge 128-bit and 256-bit SHUFPS/SHUFPD handling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148466 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-19 08:19:12 +00:00
Evan Cheng
ef2887d348 More bundle related API additions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148465 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-19 07:47:03 +00:00
Evan Cheng
3f9c251e40 Rewriter should definitly rewrite instructions inside bundles. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148464 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-19 07:46:36 +00:00
Chris Lattner
46ada15d42 Introduce a new MutableArrayRef class, which refers to a series of mutable 
T's that are consequtively in memory.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148463 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-19 06:34:52 +00:00
Evan Cheng
a2e435cd23 Enhance finalizeBundle to return end of bundle iterator because it makes sense. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148462 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-19 06:13:10 +00:00
Jim Grosbach
ae69f703d5 ARM assembly diagnostic caret in better position for FPImm. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148459 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-19 02:47:30 +00:00
Jim Grosbach
9363c58dc2 Thumb2 relaxation for tADR to t2ADR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148456 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-19 02:09:38 +00:00
Jim Grosbach
d26bad079d Add comment and fix range check in condition. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148455 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-19 01:50:30 +00:00
Jim Grosbach
904b7be27e Add testcase. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148454 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-19 01:36:59 +00:00
Lang Hames
c2220057c0 Added methods to get the live range immediately before a given slot. Intended to parallel the getVNInfoBefore method. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148453 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-19 01:36:06 +00:00
Nick Lewycky
2faa5d2328 Space after punctuation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148451 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-19 01:13:47 +00:00
Evan Cheng
bca15f9c80 - Slight change to finalizeBundle() interface. LastMI is not exclusive (pointing 
to instruction right after the last instruction in the bundle.
- Add a finalizeBundle() variant that doesn't specify LastMI. Instead, the code
  will find the last instruction in the bundle by following the 'InsideBundle'
  marker. This is useful in case bundles are formed early (i.e. during MI
  scheduling) but finalized later (i.e. after register allocator has finished
  rewriting virtual registers with physical registers).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148444 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-19 00:46:06 +00:00
Nick Lewycky
22de16dc75 Add a TargetOption for disabling tail calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148442 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-19 00:34:10 +00:00
Evan Cheng
9b159710eb Rename Finalizebundle to finalizeBundle to conform to coding guideline. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148440 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-19 00:06:10 +00:00
Jakob Stoklund Olesen
c38c4561cd Add experimental -x86-use-regmask command line option. 
It adds register mask operands to x86 call instructions.  Once all the
backend passes support register mask operands, this will be permanently
enabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148438 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-18 23:52:22 +00:00
Jakob Stoklund Olesen
71f0fc1ca8 Ignore register mask operands when lowering instructions to MC. 
This is similar to implicit register operands.  MC doesn't understand
register liveness and call clobbers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148437 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-18 23:52:19 +00:00
Jakob Stoklund Olesen
9cf37e8b48 Add a RegisterMaskSDNode class. 
This SelectionDAG node will be attached to call nodes by LowerCall(),
and eventually becomes a MO_RegisterMask MachineOperand on the
MachineInstr representing the call instruction.

LowerCall() will attach a register mask that depends on the calling
convention.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148436 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-18 23:52:12 +00:00
Rafael Espindola
8887a0f341 Add support for the gnueabihf environment. Patch by Sylvestre Ledru. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148434 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-18 23:35:29 +00:00
Jim Grosbach
0b4c673886 Thumb2 alternate syntax for LDR(literal) and friends. 
Explicit pc-relative syntax. For example, "ldrb r2, [pc, #-22]".

rdar://10250964

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148432 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-18 22:46:46 +00:00
Devang Patel
b8ba13f009 Process instructions after match to select alternative encoding which may be more desirable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148431 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-18 22:42:29 +00:00
Jim Grosbach
5aa5368ccd Replace FIXME with explanatory comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148427 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-18 22:04:42 +00:00
Jim Grosbach
256ba4f42a Thumb2 relaxation for LDR(literal). 
If the fixup is out of range for the Thumb1 instruction, relax it
to the Thumb2 encoding instead.

rdar://10711829

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148424 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-18 21:54:16 +00:00
Jim Grosbach
ec4ceb797a MCAssembler tweak for determining when a symbol difference is resolved. 
If the two fragments are in the same Atom, then the difference
expression is resolvable at compile time. Previously we were checking
that they were in the same fragment, but that breaks down in the
presence of instruction relaxation which has multiple fragments in the
same atom.

rdar://10711829

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148423 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-18 21:54:12 +00:00
Jim Grosbach
a2ee0fa3ee Rename pattern for clarity. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148422 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-18 21:54:09 +00:00
Dan Gohman
2f77bbd1bf Add a depth limit to avoid runaway recursion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148419 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-18 21:24:45 +00:00
Dan Gohman
1dae3e965c Use llvm.global_ctors to locate global constructors instead 
of recognizing them by name.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148416 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-18 21:19:38 +00:00
Jakub Staszak
785a7a97da Remove trailing spaces and unneeded includes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148415 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-18 21:16:33 +00:00
Nadav Rotem
a402271351 Document the fact that the selection dag changes the vselect condition type 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148411 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-18 20:50:30 +00:00
Lang Hames
bfab85e9b1 Fixed macro condition. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148408 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-18 19:48:31 +00:00
Jim Grosbach
bc3af9b618 Tidy up. 80 columns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148401 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-18 18:52:20 +00:00
Jim Grosbach
ec3433852d Tidy up. MCAsmBackend naming conventions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148400 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-18 18:52:16 +00:00
Bill Wendling
160fee7349 Remove dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148384 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-18 10:10:28 +00:00
Nadav Rotem
819026f2f8 Fix a bug in the type-legalization of vector integers. When we bitcast one vector type to another, we must not bitcast the result if one type is widened while the other is promoted. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148383 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-18 08:33:18 +00:00
Pete Cooper
cd7f02bb43 Fix ISD::REG_SEQUENCE to accept physical registers and change TwoAddressInstructionPass to insert copies for any physical reg operands of the REG_SEQUENCE 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148377 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-18 04:16:16 +00:00
Jim Grosbach
5a7efa7f13 Thumb2 load/store fixups don't set the thumb bit. 
Load/store instructions w/ a fixup to be relative a function marked as thumb
don't use the low bit to specify thumb vs. non-thumb like interworking
branches do, so don't set it when dealing with those fixups.

rdar://10348687.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148366 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-18 00:40:25 +00:00
Jim Grosbach
9b5b125c34 Move some ARM specific MCAssmebler bits into the ARMAsmBackend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148364 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-18 00:23:57 +00:00
Jakob Stoklund Olesen
31867660cb Add a CoveredBySubRegs property to Register descriptions. 
When set, this bit indicates that a register is completely defined by
the value of its sub-registers.

Use the CoveredBySubRegs property to infer which super-registers are
call-preserved given a list of callee-saved registers.  For example, the
ARM registers D8-D15 are callee-saved.  This now automatically implies
that Q4-Q7 are call-preserved.

Conversely, Win64 callees save XMM6-XMM15, but the corresponding
YMM6-YMM15 registers are not call-preserved because they are not fully
defined by their sub-registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148363 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-18 00:16:39 +00:00