Commit Graph

6 Commits

Author SHA1 Message Date
Dan Gohman
d4d01154ef Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul,
when the type is floating-point.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102969 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-03 22:36:46 +00:00
Chris Lattner
dd8e09ad76 this test requires SSE, thanks to jyasskin for pointing this out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93360 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-13 21:51:41 +00:00
Jeffrey Yasskin
3aba5b1d60 Try to fix the ARM and PPC buildbots. The -mattr=vector-unaligned-mem
flag doesn't exist there, and this is an x86 test.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93279 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-13 00:31:43 +00:00
Chris Lattner
c31b0fc31f reduce this to a sensible testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93189 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-11 21:58:19 +00:00
David Greene
67df1a1d64 Shorten up this testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93187 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-11 21:50:35 +00:00
David Greene
95eb2eeea6 Implement a feature (-vector-unaligned-mem) to allow targets to
ignore alignment requirements for SIMD memory operands.  This
is useful on architectures like the AMD 10h that do not trap on
unaligned references if a status bit is twiddled at startup time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93151 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-11 16:29:42 +00:00