Commit Graph

26 Commits

Author SHA1 Message Date
Chris Lattner
c240bb0ede factor the operand list (and related fields/operations) out of
CodeGenInstruction into its own helper class.  No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117893 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 04:03:32 +00:00
Jim Grosbach
bb16824dc3 A few 80 column cleanups
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116069 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 18:13:57 +00:00
Jim Grosbach
0e99219e03 Move checking for t2MOVCCi16 to the right place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115994 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-07 22:14:01 +00:00
Nick Lewycky
366b1e1f3f Fix typo in comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115986 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-07 21:55:16 +00:00
Jim Grosbach
a4257162be Allow use of the 16-bit literal move instruction in CMOVs for Thumb2 mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115890 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-07 00:53:56 +00:00
Jim Grosbach
3bbdcea49a Allow use of the 16-bit literal move instruction in CMOVs for ARM mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115884 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-07 00:42:42 +00:00
Jim Grosbach
4fc92e02d7 Now that VDUPfqf and VDUPfdfare properly pseudos, nuke the special handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115841 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-06 21:17:07 +00:00
Bob Wilson
dbb350a5c7 Fix a comment typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112302 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-27 21:56:59 +00:00
Bob Wilson
9a1c189d9e Add a separate ARM instruction format for Saturate instructions.
(I discovered 2 more copies of the ARM instruction format list, bringing the
total to 4!!  Two of them were already out of sync.  I haven't yet gotten into
the disassembler enough to know the best way to fix this, but something needs
to be done.)  Add support for encoding these instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110754 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11 00:01:18 +00:00
Dale Johannesen
7835f1fcdb Changes to ARM tail calls, mostly cosmetic.
Add explicit testcases for tail calls within the same module.
Duplicate some code to humor those who think .w doesn't apply on ARM.
Leave this disabled on Thumb1, and add some comments explaining why it's hard
and won't gain much.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107851 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-08 01:18:23 +00:00
Dale Johannesen
10416803c1 An attempt to fix the problem Anton reported with
ARM tail calls.  Don't know if it works, but it
doesn't break Darwin.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106309 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18 20:44:28 +00:00
Dale Johannesen
6470a116f1 Next round of tail call changes. Register used in a tail
call must not be callee-saved; following x86, add a new
regclass to represent this.  Also fixes a couple of bugs.
Still disabled by default; Thumb doesn't work yet.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106053 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15 22:08:33 +00:00
Dale Johannesen
51e28e6348 Early implementation of tail call for ARM.
A temporary flag -arm-tail-calls defaults to off,
so there is no functional change by default.
Intrepid users may try this; simple cases work
but there are bugs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105413 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-03 21:09:53 +00:00
Johnny Chen
56a1afb6b0 When doing Thumb disassembly, there's no need to consider t2ADDrSPi12/t2SUBrSPi12,
as their generic counterparts t2ADDri12/t2SUBri12 should suffice.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101929 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-20 18:45:24 +00:00
Johnny Chen
1808e4d251 If all the bit positions are not specified; do not decode the instructions.
We are bound to fail!  For proper disassembly, the well-known encoding bits
of the instruction must be fully specified.

This also removes pseudo instructions from considerations of disassembly,
which is a better design and less fragile than the name matchings.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100899 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-09 21:01:02 +00:00
Bob Wilson
ec80e2693a Provide versions of the ARM eh_sjlj_setjmp instructions for non-VFP subtargets
such that the non-VFP versions have no implicit defs of VFP registers.
If any callee-saved VFP registers are marked as having been defined, the
prologue/epilogue code will try to save and restore them.
Radar 7770432.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100892 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-09 20:41:18 +00:00
Johnny Chen
e0c74fb1de ARM decoder emitter should print out useful information unconditionally when it
encounters decoding conflicts, instead of wrapping it inside the DEBUG() macro. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100886 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-09 19:31:33 +00:00
Johnny Chen
2d16a67b94 Now that Evan Cheng has fixed the coalescer bug (r100804), the workaround code
to avoid memcpy() call is no longer necessary.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100811 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-08 21:23:54 +00:00
Benjamin Kramer
454c4ce479 Various MSVC warning fixes about truncated 64 bit shifts and const pointers passed to free.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100767 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-08 15:25:57 +00:00
Eric Christopher
72666f2be9 Fix typo and correct comment somewhat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100691 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07 20:58:16 +00:00
Johnny Chen
3c500e6947 Re-enable ARM/Thumb disassembler and add a workaround for a memcpy() call in
ARMDecoderEmitter.cpp, with FIXME comment.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100690 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07 20:53:12 +00:00
Chandler Carruth
1e86e3fb4b Fix a warning in GCC about a pointless typedef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100268 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-03 04:45:24 +00:00
Johnny Chen
55f71187a5 Move variable "Bits" declaration/definition into the DEBUG block where its usage
is expected.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100247 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02 23:13:52 +00:00
Johnny Chen
493a441391 Fixed build warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100244 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02 22:51:04 +00:00
Johnny Chen
9981814a40 Change from .../Support/DataTypes.h to .../System/DataTypes.h.
(Fix build failure)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100243 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02 22:41:06 +00:00
Johnny Chen
b68a3ee82a Second try of initial ARM/Thumb disassembler check-in. It consists of a tablgen
backend (ARMDecoderEmitter) which emits the decoder functions for ARM and Thumb,
and the disassembler core which invokes the decoder function and builds up the
MCInst based on the decoded Opcode.

Reviewed by Chris Latter and Bob Wilson.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100233 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02 22:27:38 +00:00