Commit Graph

72685 Commits

Author SHA1 Message Date
David Majnemer
8c6dda0b7d Attempt to pacify buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217499 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-10 13:01:03 +00:00
Tim Northover
01dbae1163 ARM: don't size-reduce STMs using the LR register.
The only Thumb-1 multi-store capable of using LR is the PUSH instruction, which
translates to STMDB, so we shouldn't convert STMIAs.

Patch by Sergey Dmitrouk.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217498 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-10 12:53:28 +00:00
David Majnemer
b3a86a097b Object: Add support for bigobj
This adds support for reading the "bigobj" variant of COFF produced by
cl's /bigobj and mingw's -mbig-obj.

The most significant difference that bigobj brings is more than 2**16
sections to COFF.

bigobj brings a few interesting differences with it:
- It doesn't have a Characteristics field in the file header.
- It doesn't have a SizeOfOptionalHeader field in the file header (it's
  only used in executable files).
- Auxiliary symbol records have the same width as a symbol table entry.
  Since symbol table entries are bigger, so are auxiliary symbol
  records.

Write support will come soon.

Differential Revision: http://reviews.llvm.org/D5259

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217496 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-10 12:51:52 +00:00
Daniel Sanders
cfae729840 [mips] Remove inverted predicates from MipsSubtarget that were only used by MipsCallingConv.td
Summary: No functional change

Reviewers: echristo, vmedic

Reviewed By: echristo, vmedic

Subscribers: echristo, llvm-commits

Differential Revision: http://reviews.llvm.org/D5266

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217494 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-10 12:02:27 +00:00
Daniel Sanders
9a86695445 [mips] Return an ArrayRef from MipsCC::intArgRegs() and remove MipsCC::numIntArgRegs()
Summary: No functional change.

Reviewers: vmedic

Reviewed By: vmedic

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5265

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217485 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-10 10:37:03 +00:00
Stepan Dyatkovskiy
e944e11ede MergeFunctions: FunctionPtr has been renamed to FunctionNode.
It's supposed to store additional pass information for current function here.
That was the reason for name change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217483 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-10 10:08:25 +00:00
Yuri Gorshenin
ca31084292 [asan-assembly-instrumentation] Added CFI directives to the generated instrumentation code.
Summary: [asan-assembly-instrumentation] Added CFI directives to the generated instrumentation code.

Reviewers: eugenis

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5189

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217482 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-10 09:45:49 +00:00
Job Noorman
77f923cfc1 Drop the W postfix on the 16-bit registers.
This ensures the inline assembly register constraints are properly recognised in
TargetLowering::getRegForInlineAsmConstraint.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217479 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-10 06:58:14 +00:00
Kai Nacke
5672e68951 [MIPS] Add aliases for sync instruction used by Octeon CPU
This commit adds aliases for the sync instruction (synciobdma,
syncs, syncw, syncws) which are used by the Octeon CPU.

Reviewed by D. Sanders

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217477 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-10 06:10:24 +00:00
Craig Topper
c4e394a333 Use cast to MVT instead of EVT on a couple calls to getSizeInBits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217473 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-10 04:51:36 +00:00
Lang Hames
d453c22ddb [MCJIT] Remove redundant architecture check from RuntimeDyldMachOI386.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217470 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-10 00:13:42 +00:00
David Blaikie
01c14f6de0 Sink PrevCU updating into DwarfUnit::addRange to ensure consistency
So that the two operations in DwarfDebug couldn't get separated (because
I accidentally separated them in some work in progress), put them
together. While we're here, move DwarfUnit::addRange to
DwarfCompileUnit, since it's not relevant to type units.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217468 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-09 23:13:01 +00:00
David Blaikie
9e0dae166f Remove DwarfDebug::PrevSection, PrevCU is sufficient for handling address range holes.
PrevSection/PrevCU are used to detect holes in the address range of a CU
to ensure the DW_AT_ranges does not include those holes. When we see a
function with no debug info, though it may be in the same range as the
prior and subsequent functions, there should be a gap in the CU's
ranges. By setting PrevCU to null in that case, the range would not be
extended to cover the gap.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217466 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-09 22:56:36 +00:00
NAKAMURA Takumi
589d2fc893 SampleProfile.cpp: Prune a stray \param added in r217437. [-Wdocumentation]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217465 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-09 22:44:30 +00:00
Sanjay Patel
a9d7398280 Add a scheduling model for AMD 16H Jaguar (btver2).
This is a first pass at a scheduling model for Jaguar.
It's structured largely on the existing SandyBridge and SLM sched models.

Using this model, in addition to turning on the PostRA scheduler, results in 
some perf wins on internal and 3rd party benchmarks. There's not much difference 
in LLVM's test-suite benchmarking subset of tests.

Differential Revision: http://reviews.llvm.org/D5229



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217457 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-09 20:07:07 +00:00
Rafael Espindola
12af22e8cc Merge alignment of common GlobalValue.
Fixes pr20882.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217455 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-09 17:48:18 +00:00
Ed Maste
53ee51fb15 Use armv6k default for FreeBSD/ARM
Patch by Andrew Turner.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217454 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-09 17:47:24 +00:00
Rafael Espindola
e549e39190 When merging two common GlobalValues, keep the largest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217451 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-09 15:59:12 +00:00
Rafael Espindola
7b1723dc85 Move some logic to ModuleLinker::shouldLinkFromSource. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217449 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-09 15:21:00 +00:00
NAKAMURA Takumi
beab873680 ScalarOpts/LLVMBuild.txt: Prune unused dependency to IPA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217448 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-09 15:00:38 +00:00
NAKAMURA Takumi
1c47815776 ScalarOpts/LLVMBuild.txt: Reorder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217447 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-09 15:00:26 +00:00
NAKAMURA Takumi
38f37ee492 LLVMProfileData: Update LLVMBuild.txt corresponding to r217437.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217446 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-09 15:00:13 +00:00
Rafael Espindola
c787184012 Fix a use of an undefined value (the linkage).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217445 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-09 14:52:27 +00:00
Rafael Espindola
ec8b573e54 Prefer common over weak linkage when linking.
This matches the behavior of ELF linkers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217443 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-09 14:27:09 +00:00
Rafael Espindola
efed46fe31 Simplify ModuleLinker::getLinkageResult. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217441 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-09 14:07:40 +00:00
Toma Tabacu
b3fa7e412b [mips] Add assembler support for .set mips0 directive.
Summary:
This directive is used to reset the assembler options to their initial values.
Assembly programmers use it in conjunction with the ".set mipsX" directives.

This patch depends on the .set push/pop directive (http://reviews.llvm.org/D4821).

Contains work done by Matheus Almeida.

Reviewers: dsanders

Reviewed By: dsanders

Differential Revision: http://reviews.llvm.org/D4957

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217438 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-09 12:52:14 +00:00
Diego Novillo
40c949a1b4 Re-factor sample profile reader into lib/ProfileData.
Summary:
This patch moves the profile reading logic out of the Sample Profile
transformation into a generic profile reader facility in
lib/ProfileData.

The intent is to use this new reader to implement a sample profile
reader/writer that can be used to convert sample profiles from external
sources into LLVM.

This first patch introduces no functional changes. It moves the profile
reading code from lib/Transforms/SampleProfile.cpp into
lib/ProfileData/SampleProfReader.cpp.

In subsequent patches I will:

- Add a bitcode format for sample profiles to allow for more efficient
  encoding of the profile.
- Add a writer for both text and bitcode format profiles.
- Add a 'convert' command to llvm-profdata to be able to convert between
  the two (and serve as entry point for other sample profile formats).

Reviewers: bogner, echristo

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5250

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217437 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-09 12:40:50 +00:00
Daniel Sanders
052538124f [mips] Move MipsTargetLowering::MipsCC::regSize() to MipsSubtarget::getGPRSizeInBytes()
Summary:
The GPR size is more a property of the subtarget than that of the ABI so move
this information to the MipsSubtarget.

No functional change.

Reviewers: vmedic

Reviewed By: vmedic

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5009


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217436 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-09 12:11:16 +00:00
Pavel Chupin
586994a74e [x32] Emit callq for CALLpcrel32
Summary:
In AT&T annotation for both x86_64 and x32 calls should be printed as
callq in assembly. It's only a matter of correct mnemonic, object output
is ok.

Test Plan: trivial test added

Reviewers: nadav, dschuff, craig.topper

Subscribers: llvm-commits, zinovy.nis

Differential Revision: http://reviews.llvm.org/D5213

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217435 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-09 11:54:12 +00:00
Daniel Sanders
9242b13a4a [mips] Don't cache IsO32 and IsFP64 in MipsTargetLowering::MipsCC
Summary:
Use a MipsSubtarget reference instead.

No functional change.

Reviewers: vmedic

Reviewed By: vmedic

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5008

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217434 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-09 10:46:48 +00:00
Toma Tabacu
f29c5818bf [mips] Add assembler support for .set push/pop directive.
Summary:
These directives are used to save the current assembler options (in the case of ".set push") and restore the previously saved options (in the case of ".set pop").

Contains work done by Matheus Almeida.

Reviewers: dsanders

Reviewed By: dsanders

Differential Revision: http://reviews.llvm.org/D4821

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217432 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-09 10:15:38 +00:00
Renato Golin
ccfbbaca3f ARM: Negative offset support problem
This patch is to permit a negative offset usage for a non frame access.

Patch by Igor Oblakov.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217431 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-09 09:57:59 +00:00
Patrik Hagglund
3008bee7d9 [MachineSinking] Conservatively clear kill flags after coalescing.
This solves the problem of having a kill flag inside a loop
with a definition of the register prior to the loop:

%vreg368<def> ...

Inside loop:

        %vreg520<def> = COPY %vreg368
        %vreg568<def,tied1> = add %vreg341<tied0>, %vreg520<kill>

=> was coalesced into =>

        %vreg568<def,tied1> = add %vreg341<tied0>, %vreg368<kill>

MachineVerifier then complained:
*** Bad machine code: Virtual register killed in block, but needed live out. ***

The kill flag for %vreg368 is incorrect, and is cleared by this patch.

This is similar to the clearing done at the end of
MachineSinking::SinkInstruction().

Patch provided by Jonas Paulsson.

Reviewed by Quentin Colombet and Juergen Ributzka.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217427 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-09 07:47:00 +00:00
Bob Wilson
086832979b Set trunc store action to Expand for all X86 targets.
When compiling without SSE2, isTruncStoreLegal(F64, F32) would return Legal, whereas with SSE2 it would return Expand. And since the Target doesn't seem to actually handle a truncstore for double -> float, it would just output a store of a full double in the space for a float hence overwriting other bits on the stack.

Patch by Luqman Aden!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217410 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-09 01:13:36 +00:00
Justin Bogner
0acb48923d llvm-cov: Try to appease MSVC after r217404
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217406 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-08 21:31:43 +00:00
Justin Bogner
78834e522f llvm-cov: Use ErrorOr rather than an error_code* (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217404 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-08 21:04:00 +00:00
Hans Wennborg
4cd53531fd Fast-ISel: Remove dead code after falling back from selecting call instructions (PR20863)
Previously, fast-isel would not clean up after failing to select a call
instruction, because it would have called flushLocalValueMap() which moves
the insertion point, making SavedInsertPt in selectInstruction() invalid.

Fixing this by making SavedInsertPt a member variable, and having
flushLocalValueMap() update it.

This removes some redundant code at -O0, and more importantly fixes PR20863.

Differential Revision: http://reviews.llvm.org/D5249

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217401 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-08 20:24:10 +00:00
Sanjay Patel
50a5cda135 Group unsafe fmul math folds together for easier reading. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217399 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-08 20:16:42 +00:00
Alexey Samsonov
e769dc39fd Be more careful in parsing Module::ModFlagBehavior value
to make sure we don't do invalid load of an enum. Share the
conversion code between llvm::Module implementation and the
verifier.

This bug was reported by UBSan.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217395 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-08 19:16:28 +00:00
Sanjay Patel
16ee570cc3 Fix the FIXME that was just added in r217390 - remove a bunch of redundant fold permutations.
The testcases for these folds already exist in test/CodeGen/X86/fp-fast.ll.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217393 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-08 18:22:51 +00:00
Sanjay Patel
f6ab875af0 group unsafe math folds together for easier reading
Also added a FIXME regarding redundant folds for non-canonicalized constants.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217390 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-08 17:32:19 +00:00
Chad Rosier
c3c0c6df2a [AArch64] Enabled AA support for Cortex-A57.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217381 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-08 15:34:16 +00:00
Matt Arsenault
13ea374e79 R600/SI: Fix assertion from copying a TargetGlobalAddress
Assert in scheduler from an inserted copy_to_regclass from
a constant.

This only seems to break sometimes when a constant initializer
address is forced into VGPRs in a non-entry block. No test
since the only case I've managed to hit only happens with a future
patch, and that case will also not be a problem once scalar instructions
are used in non-entry blocks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217380 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-08 15:07:33 +00:00
Matt Arsenault
ef4bb30475 R600/SI: Replace LDS atomics with no return versions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217379 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-08 15:07:31 +00:00
Matt Arsenault
f1cd7ce098 R600/SI: Add InstrMapping for noret atomics.
Only handles LDS atomics for now, and will be used
to replace atomics with no uses with the no return
versions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217378 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-08 15:07:27 +00:00
Chad Rosier
b30d031de4 [AArch64] Improve AA to remove unneeded edges in the AA MI scheduling graph.
Patch by Sanjin Sijaric <ssijaric@codeaurora.org>!
Phabricator Review: http://reviews.llvm.org/D5103

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217371 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-08 14:43:48 +00:00
Chad Rosier
1ef487d463 [AArch64] Enabled AA support for Cortex-A53.
Patch by Sanjin Sijaric <ssijaric@codeaurora.org>!
Phabricator Review: http://reviews.llvm.org/D5103

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217370 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-08 14:31:49 +00:00
Sid Manning
27ebc7c2f5 Spelling correction
Another trivial spelling change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217364 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-08 13:05:23 +00:00
Andrew Trick
feae667742 Add a comment to getNewAlignmentDiff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217350 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-07 23:16:24 +00:00
Hal Finkel
5f36b46bf0 Make use @llvm.assume for loop guards in ScalarEvolution
This adds a basic (but important) use of @llvm.assume calls in ScalarEvolution.
When SE is attempting to validate a condition guarding a loop (such as whether
or not the loop count can be zero), this check should also include dominating
assumptions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217348 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-07 21:37:59 +00:00