Commit Graph

268 Commits

Author SHA1 Message Date
Devang Patel
8f31428119 Resolve DanglingDbgValue of PHI nodes where the use follows dbg.value intrinisic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124203 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-25 18:09:58 +00:00
Devang Patel
a3ee3ef71b Speculatively revert r124138.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124142 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-24 20:04:37 +00:00
Devang Patel
224a180d11 Resolve DanglingDbgValue of PHI nodes where the use follows dbg.value intrinisic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124138 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-24 19:24:37 +00:00
Anton Korobeynikov
16c29b5f28 Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123170 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 12:39:04 +00:00
Jakob Stoklund Olesen
c9df025e33 Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.
These functions not longer assert when passed 0, but simply return false instead.

No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123155 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 02:58:51 +00:00
Jakob Stoklund Olesen
358de24dc1 Use an IndexedMap for LiveOutRegInfo to hide its dependence on TargetRegisterInfo::FirstVirtualRegister.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123096 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-08 23:10:50 +00:00
Evan Cheng
c36b7069b4 Do not model all INLINEASM instructions as having unmodelled side effects.
Instead encode llvm IR level property "HasSideEffects" in an operand (shared
with IsAlignStack). Added MachineInstrs::hasUnmodeledSideEffects() to check
the operand when the instruction is an INLINEASM.

This allows memory instructions to be moved around INLINEASM instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123044 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07 23:50:32 +00:00
Bob Wilson
5e8b833707 Add ARM patterns to match EXTRACT_SUBVECTOR nodes.
Also fix an off-by-one in SelectionDAGBuilder that was preventing shuffle
vectors from being translated to EXTRACT_SUBVECTOR.
Patch by Tim Northover.

The test changes are needed to keep those spill-q tests from testing aligned
spills and restores.  If the only aligned stack objects are spill slots, we
no longer realign the stack frame.  Prior to this patch, an EXTRACT_SUBVECTOR
was legalized by loading from the stack, which created an aligned frame index.
Now, however, there is nothing except the spill slot in the stack frame, so
I added an aligned alloca.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122995 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07 04:59:04 +00:00
Evan Cheng
d08e5b48bc Avoid zero extend bit test operands to pointer type if all the masks fit in
the original type of the switch statement key.
rdar://8781238


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122935 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-06 01:02:44 +00:00
Chris Lattner
f1b4eafbfe rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for
something that just glues two nodes together, even if it is
sometimes used for flags.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122310 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-21 02:38:05 +00:00
Chris Lattner
d5b4db9824 reduce indentation by using continue, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121662 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-13 01:11:17 +00:00
Jay Foad
40f8f6264d PR5207: Change APInt methods trunc(), sext(), zext(), sextOrTrunc() and
zextOrTrunc(), and APSInt methods extend(), extOrTrunc() and new method
trunc(), to be const and to return a new value instead of modifying the
object in place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121120 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-07 08:25:19 +00:00
Devang Patel
afeaae7a94 If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121059 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-06 22:39:26 +00:00
Chris Lattner
de189be53f add TLI support indicating that jumps are more expensive than logical operations
and use this to disable a specific optimization.  Patch by Micah Villmow!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120435 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-30 18:12:52 +00:00
Wesley Peck
bf17cfa3f9 Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119990 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23 03:31:01 +00:00
Benjamin Kramer
ce750f0332 Implement the "if (X == 6 || X == 4)" -> "if ((X|2) == 6)" optimization.
This currently only catches the most basic case, a two-case switch, but can be
extended later.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119964 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-22 09:45:38 +00:00
Andrew Trick
b9e6fe1e3a Removing the useless test that I added recently. It was meant as an example, but not complicated enough to merit another test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119898 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 07:26:51 +00:00
John Thompson
7730318000 Bug 8621 fix - pointer cast stripped from inline asm constraint argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119590 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 23:58:47 +00:00
Andrew Trick
f06202f8e8 typo (4th checkin for one fix)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118913 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-12 18:36:03 +00:00
Andrew Trick
de91f3c5eb Fixes PR8287: SD scheduling time. The fix is a failsafe that prevents
catastrophic compilation time in the event of unreasonable LLVM
IR. Code quality is a separate issue--someone upstream needs to do a
better job of reducing to llvm.memcpy. If the situation can be reproduced with
any supported frontend, then it will be a separate bug.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118904 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-12 17:50:46 +00:00
Chris Lattner
a29aae7aca tidy up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118896 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-12 17:24:29 +00:00
Dan Gohman
efb8a9d0c2 Remove the memmove->memcpy optimization from CodeGen. MemCpyOpt does this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118789 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-11 16:24:49 +00:00
Duncan Sands
1440e8b918 Inside the calling convention logic LocVT is always a simple
value type, so there is no point in passing it around using
an EVT.  Use the simpler MVT everywhere.  Rather than trying
to propagate this information maximally in all the code that
using the calling convention stuff, I chose to do a mainly
low impact change instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118167 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03 11:35:31 +00:00
Devang Patel
8bc9ef77b7 If value map does not have register for an argument then try to find frame index before giving up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118022 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-02 17:19:03 +00:00
Devang Patel
a90b305af9 Use frameindex, if available, as a last resort to emit debug info for a parameter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118020 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-02 17:01:30 +00:00
John Thompson
44ab89eb37 Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117667 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 17:29:13 +00:00
Dale Johannesen
1de4aa904e Use a MemIntrinsicSDNode for ISD::PREFETCH, which touches
memory, so a MachineMemOperand is useful (not propagated
into the MachineInstr yet).  No functional change except
for dump output.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117413 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 23:11:10 +00:00
Devang Patel
7e13efad38 Assign source ordering to nodes created for StoreInst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117404 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 22:14:52 +00:00
Michael J. Spencer
391b43bf33 X86: Base _fltused on the FunctionType of the called value instead of the potentially null "CalledFunction". Thanks Duncan!
This is needed for indirect calls.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117061 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 20:49:23 +00:00
Michael J. Spencer
dd0a00a6e3 CodeGen-Windows: Only emit _fltused if a VarArg function is called with floating point args.
This should be the minimum set of functions that could possibly need it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116978 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 00:08:21 +00:00
Dan Gohman
f96e4bd2a3 Make CodeGen TBAA-aware.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116890 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 00:31:05 +00:00
Jim Grosbach
e4ad387a5a Add a pre-dispatch SjLj EH hook on the unwind edge for targets to do any
setup they require. Use this for ARM/Darwin to rematerialize the base
pointer from the frame pointer when required. rdar://8564268

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116879 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 23:27:08 +00:00
Michael J. Spencer
84ac4d5a2a X86-Windows: Emit an undefined global __fltused symbol when targeting Windows
if any floating point arguments are passed to an external function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116665 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-16 08:25:41 +00:00
Michael J. Spencer
e70c526d59 Whitespace!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116664 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-16 08:25:21 +00:00
Dan Gohman
0dadb15927 ComputeLinearIndex doesn't need its TLI argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115792 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-06 16:18:29 +00:00
Devang Patel
27f46cd639 Fix code gen crash reported in PR 8235. We still lose debug info for the unused argument here. This is a known limitation recorded debuginfo-tests/trunk/dbg-declare2.ll function 'f6' test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115323 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01 19:00:44 +00:00
Gabor Greif
fb4032f422 typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115310 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01 10:32:19 +00:00
Chris Lattner
6bf263b4a2 fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115300 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01 06:54:02 +00:00
Dale Johannesen
0488fb649a Massive rewrite of MMX:
The x86_mmx type is used for MMX intrinsics, parameters and
return values where these use MMX registers, and is also
supported in load, store, and bitcast.

Only the above operations generate MMX instructions, and optimizations
do not operate on or produce MMX intrinsics. 

MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into
smaller pieces.  Optimizations may occur on these forms and the
result casted back to x86_mmx, provided the result feeds into a
previous existing x86_mmx operation.

The point of all this is prevent optimizations from introducing
MMX operations, which is unsafe due to the EMMS problem.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115243 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-30 23:57:10 +00:00
Jakob Stoklund Olesen
2622f4622c When isel is emitting instructions for an x86 target without CMOV, the CFG is
edited during emission.

If the basic block ends in a switch that gets lowered to a jump table, any
phis at the default edge were getting updated wrong. The jump table data
structure keeps a pointer to the header blocks that wasn't getting updated
after the MBB is split.

This bug was exposed on 32-bit Linux when disabling critical edge splitting in
codegen prepare.

The fix is to uipdate stale MBB pointers whenever a block is split during
emission.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115191 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-30 19:44:31 +00:00
John Thompson
54584743f3 Fix for test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll crash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114767 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-24 22:24:05 +00:00
Michael J. Spencer
1f40960543 Get rid of pop_macro warnings on MSVC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114750 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-24 19:48:47 +00:00
Evan Cheng
8c1f4329e2 Revert 114634 for now since buildbot claim it broke Clang self-hosting. I doubt it but it's possible it's exposing another bug somewhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114681 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-23 18:32:19 +00:00
Evan Cheng
b8db1981b8 Follow up to r114630. Do not optimize away unconditional branch following a conditional one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114634 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-23 07:18:35 +00:00
Evan Cheng
266a99d161 SDISel should not optimize a unconditional branch following a conditional branch
when the unconditional branch destination is the fallthrough block. The
canonicalization makes it easier to allow optimizations on DAGs to invert
conditional branches. The branch folding pass (and AnalyzeBranch) will clean up
the unnecessary unconditional branches later.

This is one of the patches leading up to disabling codegen prepare critical edge
splitting.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114630 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-23 06:51:55 +00:00
Chris Lattner
84bd98ac7b finish pushing MachinePointerInfo through selectiondags. At this point,
I think I've audited all uses, so it should be dependable for address spaces,
and the pointer+offset info should also be accurate when there.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114464 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 18:58:22 +00:00
Bob Wilson
65ffec49f7 Define the TargetLowering::getTgtMemIntrinsic hook for ARM so that NEON load
and store intrinsics are represented with MemIntrinsicSDNodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114454 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 17:56:22 +00:00
Chris Lattner
ecf42c4720 continue MachinePointerInfo'izing, eliminating use of one of the old
getLoad overloads.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114443 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 16:36:31 +00:00
Chris Lattner
e72f2027e9 reimplement memcpy/memmove/memset lowering to use MachinePointerInfo
instead of srcvalue/offset pairs.  This corrects SV info for mem 
operations whose size is > 32-bits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114401 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 05:40:29 +00:00
Chris Lattner
e9ba5dd236 simplify interface to SelectionDAG::getMemIntrinsicNode, making it take a MachinePointerInfo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114397 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 04:57:15 +00:00