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342c64c904
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Tighten physical register invariants: Allocatable physical registers can
only be live in to a block if it is the function entry point or a landing pad.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150494 91177308-0d34-0410-b5e6-96231b3b80d8
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2012-02-14 18:51:53 +00:00 |
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4ae6a4d696
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don't test for codegen of 'store undef'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129184 91177308-0d34-0410-b5e6-96231b3b80d8
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2011-04-09 02:31:26 +00:00 |
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1e81966626
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Remove arm_apcscc from the test files. It is the default and doing this
matches what llvm-gcc and clang now produce.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106221 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-06-17 15:18:27 +00:00 |
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28dad2a5ca
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Sink dag combine's post index load / store code that swap base ptr and index into the target hook. Only the target knows whether the swap is safe. In Thumb2 mode, the offset must be an immediate. rdar://7998649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104060 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-05-18 21:31:17 +00:00 |
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