Bill Wendling
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e060eb8916
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Fix disasm of iret, sysexit, and sysret when displayed with Intel syntax.
Patch by Kay Tiong Khoo!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152487 91177308-0d34-0410-b5e6-96231b3b80d8
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2012-03-10 07:37:27 +00:00 |
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Craig Topper
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82f131a017
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Fix some Intel syntax disassembly issues with instructions that implicitly use AL/AX/EAX/RAX such as ADD/SUB/ADC/SUBB/XOR/OR/AND/CMP/MOV/TEST.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140974 91177308-0d34-0410-b5e6-96231b3b80d8
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2011-10-02 21:08:12 +00:00 |
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Craig Topper
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4da632e6e0
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Don't allow 32-bit only instructions to be disassembled in 64-bit mode. Fixes part of PR10700.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140370 91177308-0d34-0410-b5e6-96231b3b80d8
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2011-09-23 06:57:25 +00:00 |
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Craig Topper
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adf01b3f18
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Fix register printing in disassembling of push/pop of segment registers and in/out in Intel syntax mode. Fixes PR10960
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140299 91177308-0d34-0410-b5e6-96231b3b80d8
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2011-09-22 07:01:50 +00:00 |
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Craig Topper
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d3be6ecafe
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Add disassembler test for Intel syntax. Tests r139353.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139356 91177308-0d34-0410-b5e6-96231b3b80d8
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2011-09-09 06:35:44 +00:00 |
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