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3958 Commits

Author SHA1 Message Date
Bill Wendling
64e87326d9 Add support for non-zero __builtin_return_address values on X86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62338 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-16 19:25:27 +00:00
Mon P Wang
f0fcdd8e26 Expand insert/extract of a <4 x i32> with a variable index. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62281 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-15 21:10:20 +00:00
Rafael Espindola
bb46f52027 Add the private linkage. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62279 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-15 20:18:42 +00:00
Dan Gohman
79ce276083 Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph 
and into the ScheduleDAGInstrs class, so that they don't get
destructed and re-constructed for each block. This fixes a
compile-time hot spot in the post-pass scheduler.

To help facilitate this, tidy and do some minor reorganization
in the scheduler constructor functions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62275 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-15 19:20:50 +00:00
Dan Gohman
41b762a75e Add load-folding table entries for BT*ri8 instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62267 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-15 17:57:09 +00:00
Dan Gohman
c13cf130c4 Make getWidenVectorType const. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62265 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-15 17:34:08 +00:00
Dan Gohman
0746392cc2 BT appears to be available on all >= i386 chips. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62196 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-13 23:27:15 +00:00
Dan Gohman
286575c65c Don't use a BT instruction if the AND has multiple uses. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62195 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-13 23:25:30 +00:00
Dan Gohman
f31408d75c Disable the register+memory forms of the bt instructions for now. Thanks 
to Eli for pointing out that these forms don't ignore the high bits of
their index operands, and as such are not immediately suitable for use
by isel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62194 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-13 23:23:30 +00:00
Dan Gohman
4afe15b131 Add bt instructions that take immediate operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62180 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-13 20:33:23 +00:00
Dan Gohman
0c89b7e61e Fix a few more JIT encoding issues in the BT instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62179 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-13 20:32:45 +00:00
Devang Patel
83489bb770 Use DebugInfo interface to lower dbg_* intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62127 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-13 00:35:13 +00:00
Duncan Sands
ceb4d1aecb Rename getABITypeSize to getTypePaddedSize, as 
suggested by Chris.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62099 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-12 20:38:59 +00:00
Evan Cheng
f2accb5c9e 80 col violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62024 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-10 03:33:22 +00:00
Misha Brukman
9b8f542e27 Removed trailing whitespace from Makefiles. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61991 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-09 16:44:42 +00:00
Dan Gohman
5446274bd2 Add load-folding table entries for MOVDQA. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61972 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-09 02:40:34 +00:00
Dan Gohman
b134709a58 Whitespace and other minor adjustments to make SSE instructions have 
the same formatting as their corresponding SSE2 instructions, for
consistency.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61971 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-09 02:27:34 +00:00
Devang Patel
eb3fc28914 Convert DwarfWriter into a pass. 
Now Users request DwarfWriter through getAnalysisUsage() instead of creating an instance of DwarfWriter object directly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61955 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-08 23:40:34 +00:00
Dan Gohman
fbb7486560 Add patterns to match conditional moves with loads folded 
into their left operand, rather than their right. Do this
by commuting the operands and inverting the condition.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61842 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-07 01:00:24 +00:00
Dan Gohman
b33fc7b063 Add load-folding table entries for cmovno too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61841 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-07 00:44:53 +00:00
Dan Gohman
305fceb56c Define instructions for cmovo and cmovno. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61836 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-07 00:35:10 +00:00
Dan Gohman
653456c351 X86_COND_C and X86_COND_NC are alternate mnemonics for 
X86_COND_B and X86_COND_AE, respectively.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61835 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-07 00:15:08 +00:00
Dan Gohman
cca2983291 Revert r42653 and forward-port the code that lets INC64_32r be 
converted to LEA64_32r in x86's convertToThreeAddress. This
replaces code like this:
   movl  %esi, %edi
   inc   %edi
with this:
   lea   1(%rsi), %edi
which appears to be beneficial.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61830 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-06 23:34:46 +00:00
Bill Wendling
d60de51878 Revert r61415 and r61484. Duncan was correct that these weren't needed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61765 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-05 22:53:45 +00:00
Dan Gohman
d68a07650c Tidy up #includes, deleting a bunch of unnecessary #includes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61715 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-05 17:59:02 +00:00
Devang Patel
8a84e4402a squash warnings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61707 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-05 17:31:22 +00:00
Evan Cheng
7877112775 Atom and Core i7 do not have same model number after all. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61686 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-05 08:45:01 +00:00
Evan Cheng
0be6d3fb2a Add Intel processors core i7 and atom. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61603 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-03 04:24:44 +00:00
Evan Cheng
5b925c031d Fix PR3210: Detect more Intel processors. Patch by Torok Edwin. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61602 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-03 04:04:46 +00:00
Evan Cheng
ccb6976a69 Do not isel load folding bt instructions for pentium m, core, core2, and AMD processors. These are significantly slower than a load followed by a bt of a register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61557 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-02 05:35:45 +00:00
Evan Cheng
018b7ee91a Fix x86 CPU id detection to identify Penryn (and future processors). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61556 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-02 05:29:20 +00:00
Evan Cheng
52ceafa5c7 Use movaps / movd to extract vector element 0 even with sse4.1. It's still cheaper than pextrw especially if the value is in memory. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61555 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-02 05:29:08 +00:00
Duncan Sands
5480c0469e Fix PR3274: when promoting the condition of a BRCOND node, 
promote from i1 all the way up to the canonical SetCC type.
In order to discover an appropriate type to use, pass
MVT::Other to getSetCCResultType.  In order to be able to
do this, change getSetCCResultType to take a type as an
argument, not a value (this is also more logical).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61542 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-01 15:52:00 +00:00
Bill Wendling
998dee96d3 Linux wants the FDE initial location and address range to be forced to 32-bit. 
Darwin doesn't. Make this optional for platforms.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61484 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-29 22:12:11 +00:00
Chris Lattner
e55484eb45 Add a simple pattern for matching 'bt'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61426 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-25 05:34:37 +00:00
Chris Lattner
f1e9fd5676 Fix some JIT encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61425 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-25 01:32:49 +00:00
Chris Lattner
d1e3229e4b BT memory operands load from their address operand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61424 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-25 01:27:10 +00:00
Chris Lattner
1c39d4cfaa translateX86CC can never fail. Simplify it based on this. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61423 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-24 23:53:05 +00:00
Bill Wendling
722f5f1cfb Darwin likes for the EH frame to be non-local. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61420 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-24 08:05:17 +00:00
Bill Wendling
d4121bef3c GCC doesn't emit DW_EH_PE_sdata4 for the FDE encoding on Darwin. I'm not sure 
about other platforms.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61415 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-24 05:25:49 +00:00
Dan Gohman
82779704ff Fix a compiler-abort on a testcase where the stack-pointer is added to 
a symbolic constant. This is unlikely to be intentional, but it
shouldn't crash the compiler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61408 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-24 00:27:51 +00:00
Chris Lattner
4328708bad indentation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61407 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-24 00:11:37 +00:00
Chris Lattner
4c78e0286a simplify some control flow and reduce indentation, no functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61404 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-23 23:42:27 +00:00
Dan Gohman
c7a37d4ff2 Add instruction patterns and encodings for the x86 bt instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61400 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-23 22:45:23 +00:00
Devang Patel
fd1c6c3123 Silence unused variable warnings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61392 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-23 21:56:28 +00:00
Dan Gohman
0b1d4a798d Clean up the atomic opcodes in SelectionDAG. 
This removes all the _8, _16, _32, and _64 opcodes and replaces each
group with an unsuffixed opcode. The MemoryVT field of the AtomicSDNode
is now used to carry the size information. In tablegen, the size-specific
opcodes are replaced by size-independent opcodes that utilize the
ability to compose them with predicates.

This shrinks the per-opcode tables and makes the code that handles
atomics much more concise.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61389 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-23 21:37:04 +00:00
Mon P Wang
62c75ea397 Fixed code generation for v8i16 and v16i8 splats on X86. 
Fixed lowering of v8i16 shuffles for v8i16 when we fall back to extract/insert.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61365 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-23 04:03:27 +00:00
Dan Gohman
15a3a49e19 Make the fuse-failed debug output human-readable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61356 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-23 00:19:20 +00:00
Dan Gohman
b12b1a27f5 Fix fast-isel to not emit invalid assembly when presented with a 
constant shift count that doesn't fit in the shift instruction's
immediate field. This fixes PR3242.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61281 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-20 17:19:40 +00:00
Dan Gohman
018a34c576 Move the patterns which have i8 immediates before the patterns 
that have i32 immediates so that they get selected first. This
currently only matters in the JIT, as assemblers will
automatically use the smallest encoding.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61250 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-19 18:25:21 +00:00