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7 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
57b0fb7850 Fix one more batch of X86 tests to be register allocation dependent. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128919 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 20:20:30 +00:00
Dan Gohman
ee1c870778 Eliminate the other half of the BRCOND optimization, and update 
as many tests as possible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106749 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-24 15:24:03 +00:00
Dan Gohman
36a0947820 Eliminate more uses of llvm-as and llvm-dis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81290 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 23:54:48 +00:00
Dan Gohman
ae3a0be92e Split the Add, Sub, and Mul instruction opcodes into separate 
integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.

For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.

This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-04 22:49:04 +00:00
Evan Cheng
c3417609ae Undo spill weight tweak. Need to investigate the performance regressions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52572 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-06-21 06:45:54 +00:00
Evan Cheng
72d255aff9 This also got better (55 - 51 instructions). But doing one more re-materialization. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52482 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-06-19 01:50:13 +00:00
Evan Cheng
82a6d23700 Fixed a coalescer bug caused by a typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48526 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-19 02:26:36 +00:00