Rafael Espindola
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61369da0e5
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select code like
ldr rx, [ry, #offset]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29664 91177308-0d34-0410-b5e6-96231b3b80d8
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2006-08-14 19:01:24 +00:00 |
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Rafael Espindola
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7a53bd0890
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fix the spill code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29583 91177308-0d34-0410-b5e6-96231b3b80d8
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2006-08-09 16:41:12 +00:00 |
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Rafael Espindola
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1a00946817
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initial support for variable number of arguments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29567 91177308-0d34-0410-b5e6-96231b3b80d8
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2006-08-08 13:02:29 +00:00 |
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Rafael Espindola
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341b864c8d
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use a 'register pressure reducing' scheduler
make sure only one move is used in a hello world
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29520 91177308-0d34-0410-b5e6-96231b3b80d8
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2006-08-04 12:48:42 +00:00 |
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Rafael Espindola
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fac00a93a9
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implement function calling of functions with up to 4 arguments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29274 91177308-0d34-0410-b5e6-96231b3b80d8
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2006-07-25 20:17:20 +00:00 |
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Rafael Espindola
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58421d7d08
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initial implementation of ARMRegisterInfo::eliminateFrameIndex
fixes test/Regression/CodeGen/ARM/ret_arg5.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28854 91177308-0d34-0410-b5e6-96231b3b80d8
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2006-06-18 00:08:07 +00:00 |
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Chris Lattner
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88a96252ee
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This test isn't implemented yet
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28820 91177308-0d34-0410-b5e6-96231b3b80d8
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2006-06-16 16:36:50 +00:00 |
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Rafael Espindola
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5482ef3722
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added some tests for argument passing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28644 91177308-0d34-0410-b5e6-96231b3b80d8
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2006-06-01 22:01:25 +00:00 |
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Rafael Espindola
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2776bd1d2a
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create test/Regression/CodeGen/ARM/ and add a minimal test to it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28468 91177308-0d34-0410-b5e6-96231b3b80d8
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2006-05-25 10:49:19 +00:00 |
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