Commit Graph

4149 Commits

Author SHA1 Message Date
Jim Grosbach
4dbfdfba6c TableGen: AsmMatcher support for better operand diagnostics.
"Invalid operand" may be a completely correct diagnostic, but it's often
insufficiently specific to really help identify and fix the problem in
assembly source. Allow a target to specify a more-specific diagnostic kind
for each AsmOperandClass derived definition and use that to provide
more detailed diagnostics when an operant of that class resulted in a
match failure.

rdar://8987109

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159050 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22 23:56:44 +00:00
Hal Finkel
b460a33829 Revert r158679 - use case is unclear (and it increases the memory footprint).
Original commit message:
    Allow up to 64 functional units per processor itinerary.

    This patch changes the type used to hold the FU bitset from unsigned to uint64_t.
    This will be needed for some upcoming PowerPC itineraries.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159027 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22 20:27:13 +00:00
Marshall Clow
a6d98b8b6c Reverting makefile change wile I figure out what the heck happened
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159017 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22 18:12:28 +00:00
Marshall Clow
360713ec94 Added building yaml2obj to the configure+make build system
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159014 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22 17:43:40 +00:00
Andrew Trick
d85934b3e5 Use "NoItineraries" for processors with no itineraries.
This makes it explicit when ScoreboardHazardRecognizer will be used.
"GenericItineraries" would only make sense if it contained real
itinerary values and still required ScoreboardHazardRecognizer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158963 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22 03:58:51 +00:00
Marshall Clow
c57b888558 New test tool: obj2yaml
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158730 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-19 18:02:35 +00:00
Hal Finkel
e877c4f9c7 Allow up to 64 functional units per processor itinerary.
This patch changes the type used to hold the FU bitset from unsigned to uint64_t.
This will be needed for some upcoming PowerPC itineraries.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158679 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-18 21:08:18 +00:00
Jim Grosbach
325bd661ff TableGen: AsmMatcher missing-features list minimization.
When returning a 'cannot match due to missing CPU features' error code,
if there are multiple potential matches with different feature sets,
return the smallest set of missing features from the alternatives as
that's most likely to be the one that's desired.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158673 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-18 19:45:46 +00:00
Hal Finkel
3f696e568b Add two newlines in ParseSubtargetFeatures's debug output after the CPU is printed.
There is otherwise not a newline between the CPU name and the start of the next
pass's output which makes both difficult to read.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158350 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-12 04:21:36 +00:00
Jakob Stoklund Olesen
6f36fa981a Write llvm-tblgen backends as functions instead of sub-classes.
The TableGenBackend base class doesn't do much, and will be removed
completely soon.

Patch by Sean Silva!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158311 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-11 15:37:55 +00:00
Andrew Trick
0076ad7eeb Sched itinerary fix: Avoid static initializers.
This fixes an accidental dependence on static initialization order that I introduced yesterday.

Thank you Lang!!!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158215 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-08 18:25:47 +00:00
Owen Anderson
7e8921b0d1 Teach the AsmMatcherEmitter to allow InstAlias' where the suboperands of a complex operand are called out explicitly in the asm string.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158183 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-08 00:25:03 +00:00
Benjamin Kramer
955f938751 Remove dead private member variables from gtest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158101 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-06 20:23:00 +00:00
Benjamin Kramer
95a9d93772 Round 2 of dead private variable removal.
LLVM is now -Wunused-private-field clean except for
- lib/MC/MCDisassembler/Disassembler.h. Not sure why it keeps all those unaccessible fields.
- gtest.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158096 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-06 19:47:08 +00:00
Benjamin Kramer
a7542d5f87 Remove unused private fields found by clang's new -Wunused-private-field.
There are some that I didn't remove this round because they looked like
obvious stubs. There are dead variables in gtest too, they should be
fixed upstream.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158090 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-06 18:25:08 +00:00
Justin Holewinski
c82fd37bcf Fix gtest build issue on Visual Studio 2012 RC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158046 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-06 03:11:20 +00:00
Andrew Trick
fc992996f7 misched: Added MultiIssueItineraries.
This allows a subtarget to explicitly specify the issue width and
other properties without providing pipeline stage details for every
instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157979 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-05 03:44:40 +00:00
Benjamin Kramer
d9b0b02561 Fix typos found by http://github.com/lyda/misspell-check
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157885 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-02 10:20:22 +00:00
Jakob Stoklund Olesen
b2a6d8100c Didn't mean to export this function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157756 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31 17:21:27 +00:00
Jakob Stoklund Olesen
f5d4e5158f Emit register unit root tables.
Each register unit has one or two root registers. The full set of
registers containing a given register unit can be computed as the union
of the root registers and their super-registers.

Provide an MCRegUnitRootIterator class to enumerate the roots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157753 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31 17:18:26 +00:00
Jakob Stoklund Olesen
ff09e56cda Print uint16_t numbers without a sign.
It seems I broke C++11.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157711 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30 19:20:19 +00:00
Benjamin Kramer
dee3be6029 Remove little semicolon that caused a lot of warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157684 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30 09:13:49 +00:00
Jakob Stoklund Olesen
f52baf72c1 Emit register unit lists for each register.
Register units are already used internally in TableGen to compute
register pressure sets and overlapping registers. This patch makes them
available to the code generators.

The register unit lists are differentially encoded so they can be reused
for many related registers. This keeps the total size of the lists below
200 bytes for most targets. ARM has the largest table at 560 bytes.

Add an MCRegUnitIterator for traversing the register unit lists. It
provides an abstract interface so the representation can be changed in
the future without changing all clients.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157650 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-29 23:40:00 +00:00
Benjamin Kramer
1386e9b7b1 Add intrinsics, code gen, assembler and disassembler support for the SSE4a extrq and insertq instructions.
This required light surgery on the assembler and disassembler
because the instructions use an uncommon encoding. They are
the only two instructions in x86 that use register operands
and two immediates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157634 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-29 19:05:25 +00:00
Chris Lattner
d509d0b532 switch AttrListPtr::get to take an ArrayRef, simplifying a lot of clients.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157556 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-28 01:47:44 +00:00
Chris Lattner
86208903cb rdar://11542750 - llvm.trap should be marked no return.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157551 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-27 23:20:41 +00:00
Chris Lattner
55dc5c77a3 Reimplement the intrinsic verifier to use the same table as Intrinsic::getDefinition,
making it stronger and more sane.

Delete the code from tblgen that produced the old code.

Besides being a path forward in intrinsic sanity, this also eliminates a bunch of
machine generated code that was compiled into Function.o


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157545 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-27 19:37:05 +00:00
Chris Lattner
908a831a9a move some code around so that Verifier.cpp can get access to the intrinsic info table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157540 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-27 18:28:35 +00:00
Chris Lattner
b4654c1c49 enhance the intrinsic info table to encode what *kind* of Any argument
it is (at the cost of 45 bytes of extra table space) so that the verifier can
start using it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157536 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-27 16:39:08 +00:00
Chris Lattner
e82d598ef2 rearrange some code, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157523 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-26 23:03:52 +00:00
Jakob Stoklund Olesen
d5ce3ffa67 Compress MCRegisterInfo register name tables.
Store (debugging) register names as offsets into a string table instead
of as char pointers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157449 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-25 00:21:41 +00:00
Owen Anderson
6b31d4ea36 Teach tblgen's set theory "sequence" operator to support an optional stride operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157416 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-24 21:37:08 +00:00
Patrik Hägglund
9ce6f6fe5e Fixed typo in r156905.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157320 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-23 12:34:56 +00:00
Chris Lattner
a48289a672 small refinement to r157218 to save a tiny amount of table size in the common
case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157312 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-23 05:19:18 +00:00
Jakob Stoklund Olesen
a9fdbbc55f Also compute TopoSigs in synthetic register classes.
CodeGenRegisterClass has two constructors. Both need to compute the
TopoSigs BitVector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157271 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-22 18:20:28 +00:00
Pete Cooper
b428511989 Added address space qualifier to intrinsic PointerType arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157218 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-21 23:21:28 +00:00
Chris Lattner
387c9dcdda enhance the intrinsic info stuff to emit encodings that don't fit in 32-bits into a
separate side table, using the handy SequenceToOffsetTable class.  This encodes all
these weird things into another 256 bytes, allowing all intrinsics to be encoded this way.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156995 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17 15:55:41 +00:00
Chris Lattner
d7cf5eb021 finish encoding all of the interesting details of intrinsics. Now intrinsics
are only rejected because they can't be encoded into a 32-bit unit, not because
they contain an unencodable feature.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156978 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17 05:03:24 +00:00
Chris Lattner
46aaf69e37 strengthen the intrinsic descriptor stuff to be able to handle sin, cos and other
intrinsics that use passed-in arguments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156977 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17 04:30:58 +00:00
Chris Lattner
15706cbf85 simplify code generated by tblgen that is not necessary since we dropped
compatibility with LLVM 2.x bitcode files.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156976 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17 04:07:48 +00:00
Francois Pichet
e4807c1ba1 I forgot the #ifdef _MSC_VER guard in my last commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156975 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17 04:00:03 +00:00
Francois Pichet
3aca879906 Fix the MSVC 2010 build: disable the optimizer for a problematic function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156973 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17 03:38:19 +00:00
Jakob Stoklund Olesen
3778aeb748 Use RegUnits to compute overlapping registers.
TableGen already computes register units as the basic unit of
interference. We can use that to compute the set of overlapping
registers.

This means that we can easily compute overlap sets for one register at a
time. There is no benefit to computing all registers at once.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156960 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-16 23:03:04 +00:00
Chris Lattner
a98aa6ad1e Significantly reduce the compiled size of Functions.cpp by turning a big blob of tblgen
generated code (for Intrinsic::getType) into a table.  This handles common cases right now,
but I plan to extend it to handle all cases and merge in type verification logic as well
in follow-on patches.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156905 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-16 06:34:44 +00:00
Chris Lattner
7200c5cd30 have tblgen emit cast<> instead of dyn_cast<> when we know it must succeed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156902 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-16 04:51:09 +00:00
Daniel Dunbar
b5cd41e26f llvm-build: Add support for non-installed libraries (e.g., gtest).
- These libraries are only reported by llvm-config when run from a development
   tree.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156838 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-15 18:44:17 +00:00
Daniel Dunbar
177a119621 llvm-build: Don't emit library information for disabled targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156837 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-15 18:44:12 +00:00
Daniel Dunbar
e1accd7660 [utils] Fix Get{RepositoryPath,SourceVersion} to have a more robust is-git-svn
check.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156836 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-15 18:44:09 +00:00
Jim Grosbach
0ee07e0130 TableGen'erate mapping physical registers to encoding values.
Many targets always use the same bitwise encoding value for physical
registers in all (or most) instructions. Add this mapping to the
.td files and TableGen'erate the information and expose an accessor
in MCRegisterInfo.

patch by Tom Stellard.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156829 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-15 17:35:57 +00:00
Jakob Stoklund Olesen
40c6fb397d Create a struct representing register units in TableGen.
Besides the weight, we also want to store up to two root registers per
unit. Most units will have a single root, the leaf register they
represent. Units created for ad hoc aliasing get two roots: The two
aliasing registers.

The root registers can be used to compute the set of overlapping
registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156792 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-15 00:50:23 +00:00