Commit Graph

100122 Commits

Author SHA1 Message Date
NAKAMURA Takumi
f1352fdacd HandleLLVMOptions.cmake: Typo, s/proerty/property/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200556 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-31 17:32:36 +00:00
Matheus Almeida
9c45241485 [mips][msa] Add insert.d instruction.
This instruction is only available on Mips64 cores that implement the MSA ASE.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200543 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-31 13:31:20 +00:00
Matheus Almeida
27574db529 Update FileCheck prefixes in preparation for the addition of Mips64 MSA tests.
No functional changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200541 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-31 13:05:56 +00:00
Chandler Carruth
93228f6199 [vectorizer] Tweak the way we do small loop runtime unrolling in the
loop vectorizer to not do so when runtime pointer checks are needed and
share code with the new (not yet enabled) load/store saturation runtime
unrolling. Also ensure that we only consider the runtime checks when the
loop hasn't already been vectorized. If it has, the runtime check cost
has already been paid.

I've fleshed out a test case to cover the scalar unrolling as well as
the vector unrolling and comment clearly why we are or aren't following
the pattern.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200530 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-31 10:51:08 +00:00
Craig Topper
f0b161d774 Separate x86 opcode maps and 0x66/0xf2/0xf3 prefixes from each other in the TSFlags. This greatly simplifies the switch statements in the disassembler tables and the code emitters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200522 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-31 08:47:06 +00:00
Craig Topper
45b8e5fa49 Move REP out of the Prefix field of the X86 format. Give it its own bit. It had special handling anyway and this enables a future patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200520 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-31 07:00:55 +00:00
Craig Topper
8d67f8372b Move address override handling in X86CodeEmitter to a place where it works for VEX encoded instructions too. This allows 32-bit addressing to work in 64-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200517 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-31 05:42:35 +00:00
Craig Topper
2bb06b0002 Move address override handling in X86MCCodeEmitter to a place where it works for VEX encoded instructions too. This allows 32-bit addressing to work in 64-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200516 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-31 05:33:45 +00:00
Bob Wilson
8498c08404 Fix a bug in gcov instrumentation introduced by r195513. <rdar://15930350>
The entry block of a function starts with all the static allocas. The change
in r195513 splits the block before those allocas, which has the effect of
turning them into dynamic allocas. That breaks all sorts of things. Change to
split after the initial allocas, and also add a comment explaining why the
block is split.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200515 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-31 05:24:01 +00:00
Venkatraman Govindaraju
9026e07000 [Sparc] Save and restore float registers that may be used for parameter passing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200509 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-31 01:53:08 +00:00
Manman Ren
05324ab015 This patch teaches the DAGCombiner how to fold insert_subvector nodes
when the input is a concat_vectors and the insert replaces one of the
concat halves:

Lower half: fold (insert_subvector (concat_vectors X, Y), Z) ->
(concat_vectors Z, Y)
Upper half: fold (insert_subvector (concat_vectors X, Y), Z) ->
(concat_vectors X, Z)

This can be seen with the following IR:

define <8 x float> @lower_half(<4 x float> %v1, <4 x float> %v2, <4 x
float> %v3) {
  %1 = shufflevector <4 x float> %v1, <4 x float> %v2, <8 x i32> <i32
0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
  %2 = tail call <8 x float> @llvm.x86.avx.vinsertf128.ps.256(<8 x
float> %1, <4 x float> %v3, i8 0)

The vinsertf128 intrinsic is converted into an insert_subvector node
in SelectionDAGBuilder.cpp.

Using AVX, without the patch this generates two vinsertf128 instructions:

vinsertf128 $1, %xmm1, %ymm0, %ymm0
vinsertf128 $0, %xmm2, %ymm0, %ymm0

With the patch this is optimized into:

vinsertf128 $1, %xmm1, %ymm2, %ymm0

Patch by Robert Lougher.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200506 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-31 01:10:35 +00:00
Owen Anderson
45b07e157c DAGCombine should not produce ISD::OR nodes after operation legalization if they're not legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200503 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-31 00:51:43 +00:00
Manman Ren
21f09088d3 PGO branch weight: update edge weights in SelectionDAGBuilder.
When converting from "or + br" to two branches, or converting from
"and + br" to two branches, we correctly update the edge weights of
the two branches.

The previous attempt at r200431 was reverted at r200434 because of
two testing case failures. I modified my patch a little, but forgot
to re-run "make check-all".

Testing case CodeGen/ARM/lsr-unfolded-offset.ll is updated because of
the patch's impact on branch probability which causes changes in
spill placement.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200502 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-31 00:42:44 +00:00
Matt Arsenault
e932091eb5 Allow speculating llvm.sqrt, fma and fmuladd
This doesn't set errno, so this should be OK.
Also update the documentation to explicitly state
that errno are not set.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200501 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-31 00:09:00 +00:00
Timur Iskhodzhanov
4b4b808860 Add a link to a bug to a couple of FIXMEs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200500 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 23:14:38 +00:00
NAKAMURA Takumi
8062fa2d53 [CMake] llvm_update_compile_flags: Honor LLVM_COMPILE_FLAGS.
I accidentally mis-dropped LLVM_COMPILE_FLAGS in r200301. Sorry for that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200499 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 22:55:25 +00:00
NAKAMURA Takumi
3bbf29b84f HandleLLVMOptions.cmake: Typo in comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200498 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 22:55:20 +00:00
David Woodhouse
93f81d9b33 [x86] Fix signed relocations for i64i32imm operands
These should end up (in ELF) as R_X86_64_32S relocs, not R_X86_64_32.
Kill the horrid and incomplete special case and FIXME in
EncodeInstruction() and set things up so it can infer the signedness
from the ImmType just like it can the size and whether it's PC-relative.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200495 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 22:20:41 +00:00
Rafael Espindola
fe7fa28084 This file already has a "using namespace object;", use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200493 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 21:51:42 +00:00
Chad Rosier
dafea158a7 [AArch64] Custom lower concat_vector patterns with v4i16, v4i32, v8i8, v8i16, v16i8 types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200491 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 21:46:54 +00:00
Timur Iskhodzhanov
4e54e6fe75 Fix PR18381 - print a minimal diagnostic rather than assert on unresolved .secidx target
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200490 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 21:13:05 +00:00
Rafael Espindola
6420c11093 Only ELF has a dynamic symbol table. Remove it from ObjectFile.
COFF has only one symbol table.
MachO has a LC_DYSYMTAB, but that is not a symbol table, just extra info about
the one symbol table (LC_SYMTAB).
IR (coming soon) also has only one table.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200488 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 20:45:33 +00:00
Rafael Espindola
8010c98bd5 This has been fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200487 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 20:29:25 +00:00
Rafael Espindola
a1da3dd845 Use early returns and factor the object::Binary creation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200484 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 19:24:00 +00:00
Juergen Ributzka
014fdcdaf0 [Stackmaps] Record the stack size of each function that contains a stackmap/patchpoint intrinsic.
Re-applying the patch, but this time without using AsmPrinter methods.

Reviewed by Andy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200481 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 18:58:27 +00:00
Renato Golin
b68991fd87 Comment out unused macro because of warning
Modern compilers (Clang 3.4, GCC 4.8) warn on variadic macros being
introduced in C99, which produces a huge number of useless diagnostics
since this macro is unused in the whole project.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200479 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 18:55:47 +00:00
Timur Iskhodzhanov
735c98d94c Explicitly specify the CPU to avoid Atom-specific assembly mismatch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200473 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 17:53:45 +00:00
Evgeniy Stepanov
b2fa3a420f Reenable ARM EHABI on Android.
Broken in r200388.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200466 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 14:18:25 +00:00
Matheus Almeida
30b21ac376 [mips] Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200465 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 13:40:26 +00:00
Craig Topper
11a410b7eb Remove duplicate patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200461 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 07:19:10 +00:00
Craig Topper
28d965d300 Couple minor formatting fixes to the XXXGenDAGISel.inc files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200459 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 06:42:52 +00:00
Craig Topper
a93d7e9276 Remove some AddedComplexity tags that were forcing priority for AVX over SSE. Use predicates instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200458 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 06:26:25 +00:00
Saleem Abdulrasool
0dd6b9b974 tools: fix Twine abuse
utohexstr provides a temporary string, making it unsafe to use with the Twine
interface which will not copy the string.  Switch to using std::string.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200457 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 06:19:27 +00:00
Saleem Abdulrasool
a2a6c3911d tools: remove unnecessary typename
This is acceptted by clang and gcc, but MSVC seems to balk at it.  As it is
unneeded, simply drop it.  Fixes MSVC buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200456 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 06:19:24 +00:00
Craig Topper
db752405cb Remove duplicate pattern and add predicate checks on other patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200455 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 06:03:19 +00:00
Saleem Abdulrasool
5ecf81d8b0 tools: repair Windows build
exp2 is not available on Windows.  Fortunately, we are calculating powers of 2
with expontents within the range of [4,12].  Simply use an equivalent bitshift
operation to repair compilation with MSVC which does not provide this standard
function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200454 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 05:20:31 +00:00
Jakob Stoklund Olesen
17ca0f8f80 Implement SPARCv9 atomic_swap_64 with a pseudo.
The SWAP instruction only exists in a 32-bit variant, but the 64-bit
atomic swap can be implemented in terms of CASX, like the other atomic
rmw primitives.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200453 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 04:48:46 +00:00
Saleem Abdulrasool
09f38a0ef1 ARM IAS: support .object_arch
The .object_arch directive indicates an alternative architecture to be specified
in the object file.  The directive does *not* effect the enabled feature bits
for the object file generation.  This is particularly useful when the code
performs runtime detection and would like to indicate a lower architecture as
the requirements than the actual instructions used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200451 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 04:46:41 +00:00
Saleem Abdulrasool
459c949777 tools: add support for decoding ARM attributes
Enhance the ARM specific parsing support in llvm-readobj to support attributes.
This allows for simpler tests to validate encoding of the build attributes as
specified in the ARM ELF specification.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200450 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 04:46:33 +00:00
Saleem Abdulrasool
7a38b33dec ARM IAS: support .movsp
.movsp is an ARM unwinding directive that indicates to the unwinder that a
register contains an offset from the current stack pointer.  If the offset is
unspecified, it defaults to zero.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200449 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 04:46:24 +00:00
Saleem Abdulrasool
2c9ed5d050 ARM: suuport .tlsdescseq directive
This enhances the ARMAsmParser to handle .tlsdescseq directives.  This is a
slightly special relocation.  We must be able to generate them, but not consume
them in assembly.  The relocation is meant to assist the linker in generating a
TLS descriptor sequence.  The ELF target streamer is enhanced to append
additional fixups into the current segment and that is used to emit the new
R_ARM_TLS_DESCSEQ relocations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200448 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 04:02:47 +00:00
Saleem Abdulrasool
4747d6b0a5 ARM: support TLS descriptor relocations
Add support for tlsdesc relocations which are part of the ABI, marked as
experimental.  These relocations permit the linker to perform TLS reference
optimizations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200447 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 04:02:38 +00:00
Saleem Abdulrasool
9629ad3005 ARM: support tlscall relocations
This adds support for TLS CALL relocations.  TLS CALL relocations are used to
indicate to the linker to generate appropriate entries to resolve TLS references
via an appropriate function invocation (e.g. __tls_get_addr(PLT)).

In order to accomodate the linker relaxation of the TLS access model for the
references (GD/LD -> IE, IE -> LE), the relocation addend must be incomplete.
This requires that the partial inplace value is also incomplete (i.e. 0).  We
simply avoid the offset value calculation at the time of the fixup adjustment in
the ARM assembler backend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200446 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 04:02:31 +00:00
Juergen Ributzka
d26c0e731c Revert "[Stackmaps] Record the stack size of each function that contains a stackmap/patchpoint intrinsic."
This reverts commit r200444 to unbreak buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200445 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 03:34:02 +00:00
Juergen Ributzka
2baaf25bf5 [Stackmaps] Record the stack size of each function that contains a stackmap/patchpoint intrinsic.
Reviewed by Andy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200444 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 03:06:14 +00:00
Rafael Espindola
efdbec8b0a Simplify the handling of iterators in ObjectFile.
None of the object file formats reported error on iterator increment. In
retrospect, that is not too surprising: no object format stores symbols or
sections in a linked list or other structure that requires chasing pointers.
As a consequence, all error checking can be done on begin() and end().

This reduces the text segment of bin/llvm-readobj in my machine from 521233 to
518526 bytes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200442 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 02:49:50 +00:00
Juergen Ributzka
6bf3966f7f Extend the preserve_most/all calling convention description in LangRef about the
fact that the argument registers will be preserved too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200441 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 02:39:00 +00:00
Timur Iskhodzhanov
ab42578bdd Reland r200340 - 'Add line table debug info to COFF files when using a win32 triple'
This incorporates a couple of fixes reviewed at http://llvm-reviews.chandlerc.com/D2651

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200440 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 01:39:17 +00:00
Rafael Espindola
8ddf091e99 add a bunch of LLVM_OVERRIDE before I start refactoring these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200439 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 01:17:42 +00:00
Rafael Espindola
fc79e50982 Remove dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200436 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 01:10:21 +00:00