5 Commits

Author	SHA1	Message	Date
Anton Korobeynikov	2d7ea04e28	Perform mul combine when multiplying wiht negative constants. ... Patch by Weiming Zhao! This fixes PR12212 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153049 91177308-0d34-0410-b5e6-96231b3b80d8	2012-03-19 19:19:50 +00:00
Jim Grosbach	9ce75625eb	Update tests to handle MC-inst instruction printing of shift operations. The ... legacy asm printer uses instructions of the form, "mov r0, r0, lsl #3", while the MC-instruction printer uses the form "lsl r0, r0, #3". The latter mnemonic is correct and preferred according the ARM documentation (A8.6.98). The former are pseudo-instructions for the latter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114221 91177308-0d34-0410-b5e6-96231b3b80d8	2010-09-17 21:58:46 +00:00
Anton Korobeynikov	a9790d739a	Some cheap DAG combine goodness for multiplication with a particular constant. ... This can be extended later on to handle more "complex" constants. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103881 91177308-0d34-0410-b5e6-96231b3b80d8	2010-05-15 18:16:59 +00:00
Dan Gohman	fce288fc91	Eliminate more uses of llvm-as and llvm-dis. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81293 91177308-0d34-0410-b5e6-96231b3b80d8	2009-09-09 00:09:15 +00:00
Evan Cheng	af9e7a7c20	Fix ARM isle code that optimize multiply by constants which are power-of-2 +/- 1. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76520 91177308-0d34-0410-b5e6-96231b3b80d8	2009-07-21 00:31:12 +00:00