Commit Graph

69557 Commits

Author SHA1 Message Date
Rafael Espindola
96aa78c8c5 Add support for the --noexecstack option.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124077 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-23 17:55:27 +00:00
Ted Kremenek
584520e8e2 Null initialize a few variables flagged by
clang's -Wuninitialized-experimental warning.
While these don't look like real bugs, clang's
-Wuninitialized-experimental analysis is stricter
than GCC's, and these fixes have the benefit
of being general nice cleanups.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124073 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-23 17:05:06 +00:00
Rafael Espindola
54104db434 Add support for lowercase variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124071 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-23 16:11:25 +00:00
Chris Lattner
145c532e68 Enhance SRoA to be more aggressive about scalarization of aggregate allocas
that have PHI or select uses of their element pointers.  This can often happen
when instcombine sinks two loads into a successor, inserting a phi or select.

With this patch, we can scalarize the alloca, but the pinned elements are not
yet promoted.  This is still a win for large aggregates where only one element
is used.  This fixes rdar://8904039 and part of rdar://7339113 (poor codegen
on stringswitch).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124070 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-23 08:27:54 +00:00
Cameron Zwarich
491d8d4370 Convert two std::vectors to SmallVectors for a 3.4% speedup running -scalarrepl
on test-suite + SPEC2000 & SPEC2006.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124068 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-23 08:03:04 +00:00
Chris Lattner
6c95d24927 have AllocaInfo store the alloca being inspected, simplifying callers.
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124067 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-23 07:29:29 +00:00
Chris Lattner
d01a0da090 Rearrange some code a bit. Change MarkUnsafe to
handle the "Transformation preventing inst" printing, 
so that -scalarrepl -debug will always print the rejected
instruction.  No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124066 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-23 07:05:44 +00:00
Cameron Zwarich
55be644df6 Convert a std::vector to a SmallVector for another 5.4% speedup on domtree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124065 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-23 06:54:22 +00:00
Chris Lattner
85a7c69085 remove an old hack that avoided creating MMX datatypes. The
X86 backend has been fixed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124064 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-23 06:40:33 +00:00
Nick Lewycky
630d85a78c Use value ranges to fold ext(trunc) in SCEV when possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124062 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-23 06:20:19 +00:00
Cameron Zwarich
54cdad97eb In the simpler version of the link-eval data structure that we use in dominator
computation, the Ancestor field is always set to the Parent, so we can remove
the explicit link entirely and merge the Parent and Ancestor fields. Instead of
checking for whether an ancestor exists for a node or not, we simply check
whether the node has already been processed. This is simpler if Compress is
inlined into Eval, so I did that as well.

This is about a 3% speedup running -domtree on test-suite + SPEC2000 & SPEC2006,
but it also opens up some opportunities for further improvement.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124061 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-23 06:16:06 +00:00
Rafael Espindola
0cf5e3d51d Delay the creation of eh_frame so that the user can change the defaults.
Add support for SHT_X86_64_UNWIND.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124059 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-23 05:43:40 +00:00
Cameron Zwarich
11e222da1f Remove useless struct fields.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124058 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-23 05:11:18 +00:00
Cameron Zwarich
53e069ffab Remove friend declaration for removed function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124057 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-23 04:54:34 +00:00
Rafael Espindola
1c13026e8f Remove more duplicated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124056 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-23 04:43:11 +00:00
Cameron Zwarich
907b56ce7a Convert a std::vector to a SmallVector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124055 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-23 04:30:59 +00:00
Rafael Espindola
c85dca66e6 Remove duplicated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124054 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-23 04:28:49 +00:00
Cameron Zwarich
5c96c69161 Simplify some code now that we've removed the more optimal (but slower) version
of the link-eval data structure from dominator computation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124053 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-23 04:13:53 +00:00
Nick Lewycky
9b8d2c26bc Have SCEV turn sext(x) into zext(x) when x is s>= 0. This applies many times in
"make check" alone.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124046 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-22 22:06:21 +00:00
Eric Christopher
7ea118de46 Add a FIXME explaining the move to a single indirect call bonus per function
that we can change from indirect to direct.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124045 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-22 21:56:53 +00:00
Eric Christopher
7020f12ee8 Only apply the devirtualization bonus once instead of per-call site in the
target function.

Fixes part of rdar://8546196


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124044 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-22 21:17:33 +00:00
Venkatraman Govindaraju
8184e289db Pass sret arguments through the stack instead of through registers in Sparc backend. It makes the code generated more compliant with the sparc32 ABI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124030 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-22 13:05:16 +00:00
Benjamin Kramer
ecb89fd06c Remove dead ivar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124028 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-22 12:13:28 +00:00
Venkatraman Govindaraju
e105a3901f Added ICC, FCC as uses of movcc instruction to generate correct code when -mattr=v9 is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124027 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-22 11:36:24 +00:00
Bill Wendling
0ef755d905 ARM uses '.' in their tokens. Give it a name instead of a numeric value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124026 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-22 09:44:32 +00:00
Chris Lattner
b83e60e602 add DW_TAG for rvalue refs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124019 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-22 01:47:25 +00:00
Dan Gohman
8fb25c53bd Actually check memcpy lengths, instead of just commenting about
how they should be checked.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123999 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-21 22:07:57 +00:00
Venkatraman Govindaraju
fc3faa75cb Sparc backend:
Rename FLUSH to FLUSHW.
 Output "ta 3" instead of a "flushw" instruction if v8 instruction set is used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123997 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-21 22:00:00 +00:00
Owen Anderson
5d2e188962 Just because we have determined that an (fcmp | fcmp) is true for A < B,
A == B, and A > B, does not mean we can fold it to true.  We still need to
check for A ? B (A unordered B).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123993 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-21 19:39:42 +00:00
Evan Cheng
53519f015e Last round of fixes for movw + movt global address codegen.
1. Fixed ARM pc adjustment.
2. Fixed dynamic-no-pic codegen
3. CSE of pc-relative load of global addresses.

It's now enabled by default for Darwin.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123991 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-21 18:55:51 +00:00
Renato Golin
859f818363 Clang was not parsing target triples involving EABI and was generating wrong IR (wrong PCS) and passing the wrong information down llc via the target-triple printed in IR. I've fixed this by adding the parsing of EABI into LLVM's Triple class and using it to choose the correct PCS in Clang's Tools. A Clang patch is on its way to use this infrastructure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123990 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-21 18:25:47 +00:00
Oscar Fuentes
5969379145 Handles libffi on the CMake build.
Patch by arrowdodger!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123976 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-21 15:42:54 +00:00
Bruno Cardoso Lopes
030160073d Fix the encoding of QADD/SUB, QDADD/SUB. While qadd16, qadd8 use "rd, rn, rm",
qadd and qdadd uses "rd, rm, rn", the same applies to the 'sub' variants. This
is described in ARM manuals and matches the encoding used by the gnu assembler.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123975 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-21 14:07:40 +00:00
Venkatraman Govindaraju
46713296e0 Implement support for byval arguments in Sparc backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123974 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-21 14:00:01 +00:00
Nick Lewycky
e7c85a4c1d SCCP doesn't actually preserve the CFG. It will delete and insert terminator
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123973 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-21 08:38:09 +00:00
Michael J. Spencer
e696b350f4 Revert "Object: Renable the tests now that none of the build bots complain about aliasing."
This reverts commit 281f3901b7.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123972 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-21 06:27:04 +00:00
Andrew Trick
d1dace8aea Enable support for precise scheduling of the instruction selection
DAG. Disable using "-disable-sched-cycles".

For ARM, this enables a framework for modeling the cpu pipeline and
counting stalls. It also activates several heuristics to drive
scheduling based on the model. Scheduling is inherently imprecise at
this stage, and until spilling is improved it may defeat attempts to
schedule. However, this framework provides greater control over
tuning codegen.

Although the flag is not target-specific, it should have very little
affect on the default scheduler used by x86. The only two changes that
affect x86 are:
- scheduling a high-latency operation bumps the current cycle so independent
  operations can have their latency covered. i.e. two independent 4
  cycle operations can produce results in 4 cycles, not 8 cycles.
- Two operations with equal register pressure impact and no
  latency-based stalls on their uses will be prioritized by depth before height
  (height is irrelevant if no stalls occur in the schedule below this point).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123971 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-21 06:19:05 +00:00
Andrew Trick
c8bfd1d78f Convert -enable-sched-cycles and -enable-sched-hazard to -disable
flags. They are still not enable in this revision.

Added TargetInstrInfo::isZeroCost() to fix a fundamental problem with
the scheduler's model of operand latency in the selection DAG.

Generalized unit tests to work with sched-cycles.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123969 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-21 05:51:33 +00:00
Chris Lattner
cd151d2f95 fix PR9013, an infinite loop in instcombine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123968 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-21 05:29:50 +00:00
Chris Lattner
084fe6243a update obsolete comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123965 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-21 05:08:26 +00:00
Michael J. Spencer
281f3901b7 Object: Renable the tests now that none of the build bots complain about aliasing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123964 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-21 05:07:13 +00:00
Nick Lewycky
acf4a7c0e6 Don't try to pull vector bitcasts that change the number of elements through
a select. A vector select is pairwise on each element so we'd need a new
condition with the right number of elements to select on. Fixes PR8994.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123963 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-21 02:30:43 +00:00
Michael J. Spencer
7acdb4d237 Object: Fix type punned pointer issues by making DataRefImpl a union and using intptr_t.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123962 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-21 02:27:02 +00:00
Peter Collingbourne
be111ef182 tblgen: Add support for non-inheritable attributes
This patch makes the necessary changes to TableGen to support
non-inheritable attributes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123958 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-21 02:08:26 +00:00
Nick Lewycky
4c93a0f092 Add a constant folding of casts from zero to zero. Fixes PR9011!
While here, I'd like to complain about how vector is not an aggregate type
according to llvm::Type::isAggregateType(), but they're listed under aggregate
types in the LangRef and zero vectors are stored as ConstantAggregateZero.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123956 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-21 01:12:09 +00:00
Evan Cheng
d7e3cc840b Don't be overly aggressive with CSE of "ldr constantpool". If it's a pc-relative
value, the "add pc" must be CSE'ed at the same time. We could follow the same
approach as T2 by adding pseudo instructions that combine the ldr + "add pc".
But the better approach is to use movw + movt (which I will enable soon), so
I'll leave this as a TODO.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123949 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20 23:55:07 +00:00
Tobias Grosser
e906921480 Implement requiredTransitive
The PassManager did not implement the transitivity of requiredTransitive. This
was unnoticed since 2006.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123942 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20 21:03:22 +00:00
Tobias Grosser
5839614d97 RegionPassPrinter should contain the name of the pass printed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123941 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20 21:03:20 +00:00
Bruno Cardoso Lopes
1115c47203 Add testcases for clz encoding
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123937 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20 19:27:16 +00:00
Bruno Cardoso Lopes
e47f3751d7 Fix the encoding and parsing of clrex instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123936 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20 19:18:32 +00:00