code. It used to #include the enhanced disassembly
information for the targets it supported straight
out of lib/Target/{X86,ARM,...} but now it uses a
new interface provided by MCDisassembler, and (so
far) implemented by X86 and ARM.
Also removed hacky #define-controlled initialization
of targets in edis. If clients only want edis to
initialize a limited set of targets, they can set
--enable-targets on the configure command line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101179 91177308-0d34-0410-b5e6-96231b3b80d8
I also added a rule to the ARM target's Makefile to
build the ARM-specific instruction information table
for the enhanced disassembler.
I will add the test harness for all this stuff in
a separate commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100735 91177308-0d34-0410-b5e6-96231b3b80d8
disassembly library that provide access to
instruction information, and fixed ambiguous
wording in the comments for the header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95274 91177308-0d34-0410-b5e6-96231b3b80d8
yesterday. This eliminates possible confusion
about what exactly in this directory; the name
is still short, though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95118 91177308-0d34-0410-b5e6-96231b3b80d8
