Commit Graph

101969 Commits

Author SHA1 Message Date
NAKAMURA Takumi
da56c39758 IRTests/InstructionsTest.cpp: Avoid initializer list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204914 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 11:32:41 +00:00
Erik Verbruggen
668c2aa517 InstCombine: merge constants in both operands of icmp.
Transform:
    icmp X+Cst2, Cst
into:
    icmp X, Cst-Cst2
when Cst-Cst2 does not overflow, and the add has nsw.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204912 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 11:16:05 +00:00
Daniel Sanders
5fa6dffd30 [mips] Stop caching the result of hasMips64(), isABI_O32(), isABI_N32(), and isABI_N64() from MipsSubTarget in MipsTargetLowering
Summary:
The short name is quite convenient so provide an accessor for them instead.

No functional change

Depends on D3177

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D3178

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204911 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 10:46:12 +00:00
Chandler Carruth
a7a255f8af [cleanup] Run clang-format over these routines to remove formatting
differences from subsequent diffs, and ease review. Going to be
performing some major surgery to simplify this stuff.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204908 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 09:56:23 +00:00
Chandler Carruth
9e7e3e32c8 [cleanup] Modernize doxygen comments for the BumpPtrAllocator and
rewrite some of them to be more clear.

The terminology being used in our allocators is making me really sad. We
call things slab allocators that aren't at all slab allocators. It is
quite confusing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204907 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 09:53:31 +00:00
Elena Demikhovsky
61785a0c3d AVX-512: Implemented masking for integer arithmetic & logic instructions.
By Robert Khasanov rob.khasanov@gmail.com


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204906 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 09:45:08 +00:00
Timur Iskhodzhanov
43a55da9da Add a PR reference
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204904 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 08:52:14 +00:00
Timur Iskhodzhanov
45dfc707ee Make the recent COFF debug info tests more readable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204902 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 08:46:44 +00:00
Stepan Dyatkovskiy
fee5d23404 Rejected r204899 and r204900 due to remaining test failures on cmake-llvm-x86_64-linux buildbot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204901 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 08:38:18 +00:00
Stepan Dyatkovskiy
a36286cb49 Fixed test for r204899 (pr18931 fix)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204900 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 08:20:26 +00:00
Stepan Dyatkovskiy
fccc6901d6 Fix for pr18931: Crash using integrated assembler with immediate arithmetic
Fix description:
Expressions like 'cmp r0, #(l1 - l2) >> 3' could not be evaluated on asm parsing stage,
since it is impossible to resolve labels on this stage. In the end of stage we still have
expression (MCExpr).
Then, when we want to encode it, we expect it to be an immediate, but it still an expression.
Patch introduces a Fixup (MCFixup instance), that is processed after main encoding stage.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204899 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 07:49:39 +00:00
Jiangning Liu
09b4588309 ARM: raise error message when complex SO expressions can't really be
solved as a constant at compilation time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204898 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 07:42:58 +00:00
Lang Hames
229897211b Add missing #include <cassert> to MCSymbolizer.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204894 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 02:58:32 +00:00
Lang Hames
af0682b887 Assert that MCSymbolizer is constructed with a valid (or at least non-null)
RelocationInfo argument.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204893 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 02:49:18 +00:00
Lang Hames
7f8e6b9a5d Move MCSymbolizer's constructor into header. It's trivial - there's no need for
it to be out-of-line.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204892 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 02:42:52 +00:00
Lang Hames
7fd03c55f3 Update MCSymbolizer and its subclasses' constructors to reflect the fact that
they take ownership of the RelocationInfo they're constructed with.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204891 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 02:39:01 +00:00
Reid Kleckner
7d3c316353 inalloca: *Really* fix the docs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204890 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 01:38:48 +00:00
Reid Kleckner
b1d0dd95ee Remove unneeded stale type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204889 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 01:34:51 +00:00
Reid Kleckner
2ce21220d8 inalloca: Fix incorrect example IR and remove LangRef warning
The LangRef warning wasn't formatting the way I intended it to anyway.

Surprisingly inalloca appears to work, even when optimizations are
enabled.  We generate very bad code for it, but we can self-host and run
lots of big tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204888 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 01:32:22 +00:00
Lang Hames
85e4ae5097 Remove forward declaration for Target class - Target is already defined here.
No functional change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204885 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 01:05:49 +00:00
Quentin Colombet
566abecc9f [X86][Vectorizer Cost Model] Correct vectorization cost model for v2i64->v2f64
and v4i64->v4f64.

The new costs match what we did for SSE2 and reflect the reality of our codegen.

<rdar://problem/16381225>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204884 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 00:52:16 +00:00
Rafael Espindola
e459f72ee0 Correctly propagates st_size.
This also finally removes a bogus call to AliasedSymbol.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204883 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 00:28:24 +00:00
Jim Grosbach
e6cee9f723 add 'requires asserts' to test that needs it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204882 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 00:20:42 +00:00
Justin Bogner
11d89f4c27 llvm-cov: When reading strings in gcov data, skip leading zeros
It seems that gcov, when faced with a string that is apparently zero
length, just keeps reading words until it finds a length it likes
better. I'm not really sure why this is, but it's simple enough to
make llvm-cov follow suit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204881 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 00:06:36 +00:00
Jim Grosbach
f20d9ee6a6 X86: Correct vectorization cost model for v8f32->v8i8.
Fix the cost model to reflect the reality of our codegen.

rdar://16370633

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204880 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 00:04:11 +00:00
Nick Lewycky
ce49ab2b05 Treat lifetime.start'd memory like we treat freshly alloca'd memory. Patch by Björn Steinbrink!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204876 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 23:45:15 +00:00
Eric Christopher
1e0751bd4c Reorder arguments on test command line to make it easier to cut and
paste.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204875 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 23:10:28 +00:00
Hal Finkel
ee5f4bb6b3 [PowerPC] Generate VSX permutations for v2[fi]64 vectors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204873 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 22:58:37 +00:00
Justin Bogner
7c38741035 llvm-cov: Move XFAIL after the body of the test
llvm-cov tests are sensitive to line number changes, so putting this
at the end will limit churn when we fix the XFAIL.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204871 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 22:51:39 +00:00
Justin Bogner
e8836a72ba llvm-cov: Disable test on big endian machines
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204868 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 22:36:48 +00:00
Reid Kleckner
891835ae0f CloneFunction: Clone all attributes, including the CC
Summary:
Tested with a unit test because we don't appear to have any transforms
that use this other than ASan, I think.

Fixes PR17935.

Reviewers: nicholas

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D3194

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204866 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 22:26:35 +00:00
Ekaterina Romanova
899a605fc1 This is a fix for PR# 19051. I noticed code gen differences due to code motion when running tests with and without the debug info at O2. The problem is in branch folding. A loop wanted to skip the debug info, but actually it didn't do so.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204865 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 22:15:28 +00:00
Manman Ren
3d7d0bc71a Add comments. Addressing review comments from Evan on r204690.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204864 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 22:14:09 +00:00
Justin Bogner
2a6873fdf3 llvm-cov: Handle functions with no line number
Functions may in an instrumented binary but not in the original source
when they're inserted by the compiler or the runtime. These functions
aren't meaningful to the user, so teach llvm-cov to skip over them
instead of crashing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204863 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 22:03:06 +00:00
Kevin Enderby
70ea745ec8 Fix a problem with the ARM assembler incorrectly matching a
vector list parameter that is using all lanes "{d0[], d2[]}" but can
match and instruction with a ”{d0, d2}" parameter.

I’m finishing up a fix for proper checking of the unsupported
alignments on vld/vst instructions and ran into this.  Thus I don’t
have a test case at this time.  And adding all code that will
demonstrate the bug would obscure the very simple one line fix.
So if you would indulge me on not having a test case at this
time I’ll instead offer up a detailed explanation of what is
going on in this commit message.

This instruction:

	vld2.8  {d0[], d2[]}, [r4:64]

is not legal as the alignment can only be 16 when the size is 8.
Per this documentation:

A8.8.325 VLD2 (single 2-element structure to all lanes)
 <align> The alignment. It can be one of:
16 2-byte alignment, available only if <size> is 8, encoded as a = 1.
32 4-byte alignment, available only if <size> is 16, encoded as a = 1.
64 8-byte alignment, available only if <size> is 32, encoded as a = 1.
omitted Standard alignment, see Unaligned data access on page A3-108.

So when code is added to the llvm integrated assembler to not match
that instruction because of the alignment it then goes on to try to match
other instructions and comes across this:

	vld2.8  {d0, d2}, [r4:64]

and and matches it. This is because of the method
ARMOperand::isVecListDPairSpaced() is missing the check of the Kind.
In this case the Kind is k_VectorListAllLanes . While the name of the method
may suggest that this is OK it really should check that the Kind is
k_VectorList.

As the method ARMOperand::isDoubleSpacedVectorAllLanes() is what was
used to match {d0[], d2[]}  and correctly checks the Kind:

  bool isDoubleSpacedVectorAllLanes() const {
    return Kind == k_VectorListAllLanes && VectorList.isDoubleSpaced;
  }

where the original ARMOperand::isVecListDPairSpaced() does not check
the Kind:

  bool isVecListDPairSpaced() const {
    if (isSingleSpacedVectorList()) return false;
    return (ARMMCRegisterClasses[ARM::DPairSpcRegClassID]
              .contains(VectorList.RegNum));
  }

Jim Grosbach has reviewed the change and said:  Yep, that sounds right. …
And by "right" I mean, "wow, that's a nasty latent bug I'm really, really
glad to see fixed." :)

rdar://16436683


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204861 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 21:54:11 +00:00
Eli Bendersky
d8f4993cc7 Add a unit test for Invoke iteration, similar to the one for Call
The tests are refactored to use the same fixture.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204860 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 21:46:24 +00:00
Arnold Schwaighofer
23463c9261 PR15967 Fix in basicaa for faulty returning no alias.
This commit consist of two parts.
The first part fix the PR15967. The wrong conclusion was made when the MaxLookup
limit was reached. The fix introduce a out parameter (MaxLookupReached) to
DecomposeGEPExpression that the function aliasGEP can act upon.
The second part is introducing the constant MaxLookupSearchDepth to make sure
that DecomposeGEPExpression and GetUnderlyingObject use the same search depth.
This is a small cleanup to clarify the original algorithm.

Patch by Karl-Johan Karlsson!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204859 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 21:30:19 +00:00
Lang Hames
3a0a1f68ff Simplify PBQP graph removeAdjEdgeId implementation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204857 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 21:21:53 +00:00
Eli Bendersky
927eb31eb4 Fix bot breakage in InstructionsTest.
Makes sure the Call dies before the Function



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204856 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 21:11:34 +00:00
Eli Bendersky
1003e8fbfa Fix problem with r204836
In CallInst, op_end() points at the callee, which we don't want to iterate over
when just iterating over arguments. Now take this into account when returning
a iterator_range from arg_operands. Similar reasoning for InvokeInst.

Also adds a unit test to verify this actually works as expected.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204851 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 20:41:15 +00:00
Hal Finkel
6da0178737 [PowerPC] VSX loads and stores support unaligned access
I've not yet updated PPCTTI because I'm not sure what the actual relative cost
is compared to the aligned uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204848 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 19:39:09 +00:00
Kevin Enderby
9efa4ff901 Fix the ARM VST4 (single 4-element structure from one lane)
size 16 double-spaced registers instruction printing.

This:
	vld4.16 {d17[1], d19[1], d21[1], d23[1]}, [r7]!

was being printed as:

	vld4.16 {d17[1], d18[1], d19[1], d20[1]}, [r7]!

rdar://16435096


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204847 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 19:35:40 +00:00
Lang Hames
2ca8b98cdb Remove PBQP-cost dimension sanity assertion in PBQP::Graph::addConstructedEdge.
We're already effectively checking sanity for that in PBQP::Graph::addEdge.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204844 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 19:22:51 +00:00
Hal Finkel
b397453155 [PowerPC] Use v2f64 <-> v2i64 VSX conversion instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204843 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 19:13:54 +00:00
Lang Hames
ec97f95442 Change the PBQP graph adjacency list structure from std::set to std::vector.
The edge data structure (EdgeEntry) now holds the indices of its entries in the
adjacency lists of the nodes it connects. This trades a little ugliness for
faster insertion/removal, which is now O(1) with a cheap constant factor. All
of this is implementation detail within the PBQP graph, the external API remains
unchanged.

Individual register allocations are likely to change, since the adjacency lists
will now be ordered differently (or rather, will now be unordered). This
shouldn't affect the average quality of allocations however.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204841 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 18:58:00 +00:00
Matt Arsenault
e0e503801f R600: Add a testcase for sext_in_reg I missed.
This sext_inreg i32 in i64 case was already handled, but not enabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204840 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 18:31:06 +00:00
Hal Finkel
cb2c252f42 [PowerPC] Remove some dead VSX v4f32 store patterns
These patterns are dead (because v4f32 stores are currently promoted to v4i32
and stored using Altivec instructions), and also are likely not correct
(because they'd store the vector elements in the opposite order from that
assumed by the rest of the Altivec code).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204839 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 18:26:36 +00:00
Hal Finkel
c6940d4cb7 [PowerPC] Use VSX vector load/stores for v2[fi]64
These instructions have access to the complete VSX register file. In addition,
they "swap" the order of the elements so that element 0 (the scalar part) comes
first in memory and element 1 follows at a higher address.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204838 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 18:26:30 +00:00
Juergen Ributzka
50c385683c [MCJIT] Check if there have been errors during RuntimeDyld execution.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204837 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 18:19:27 +00:00
Eli Bendersky
65a3ced86f Enable range-for iteration over call/invoke arguments.
Similar to r204835



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204836 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 18:18:02 +00:00